OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [i386/] [x86-64-ept-intel.d] - Blame information for rev 205

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 205 julius 
#objdump: -drwMintel
2 
#name: x86-64 EPT (Intel mode)
3 
#source: x86-64-ept.s
4 
 
5 
.*: +file format .*
6 
 
7 
Disassembly of section .text:
8 
 
9 
0+ <_start>:
10 
[       ]*[a-f0-9]+:    66 0f 38 80 19          invept rbx,OWORD PTR \[rcx\]
11 
[       ]*[a-f0-9]+:    66 44 0f 38 80 19       invept r11,OWORD PTR \[rcx\]
12 
[       ]*[a-f0-9]+:    66 0f 38 81 19          invvpid rbx,OWORD PTR \[rcx\]
13 
[       ]*[a-f0-9]+:    66 44 0f 38 81 19       invvpid r11,OWORD PTR \[rcx\]
14 
[       ]*[a-f0-9]+:    66 0f 38 80 19          invept rbx,OWORD PTR \[rcx\]
15 
[       ]*[a-f0-9]+:    66 44 0f 38 80 19       invept r11,OWORD PTR \[rcx\]
16 
[       ]*[a-f0-9]+:    66 0f 38 81 19          invvpid rbx,OWORD PTR \[rcx\]
17 
[       ]*[a-f0-9]+:    66 44 0f 38 81 19       invvpid r11,OWORD PTR \[rcx\]
18 
#pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.