URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [binutils-2.20.1/] [ld/] [testsuite/] [ld-arm/] [arm-static-app.d] - Blame information for rev 841

Go to most recent revision | Details | Compare with Previous | View Log


 
tmpdir/arm-static-app:     file format elf32-(little|big)arm
architecture: arm, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x.*
 
Disassembly of section .text:
 
.* <_start>:
    .*: e1a0c00d        mov     ip, sp
    .*: e92dd800        push    {fp, ip, lr, pc}
    .*: eb000001        bl      .* 
    .*: e89d6800        ldm     sp, {fp, sp, lr}
    .*: e12fff1e        bx      lr
 
.* :
    .*: e1a0c00d        mov     ip, sp
    .*: e92dd800        push    {fp, ip, lr, pc}
    .*: eb000001        bl      .* 
    .*: e89d6800        ldm     sp, {fp, sp, lr}
    .*: e12fff1e        bx      lr
 
.* :
    .*: e12fff1e        bx      lr

Line No.	Rev	Author	Line
1	205	julius
2			`tmpdir/arm-static-app: file format elf32-(little\|big)arm`
3			`architecture: arm, flags 0x00000112:`
4			`EXEC_P, HAS_SYMS, D_PAGED`
5			`start address 0x.*`
6
7			`Disassembly of section .text:`
8
9			`.* <_start>:`
10			`.*: e1a0c00d mov ip, sp`
11			`.*: e92dd800 push {fp, ip, lr, pc}`
12			`.: eb000001 bl .`
13			`.*: e89d6800 ldm sp, {fp, sp, lr}`
14			`.*: e12fff1e bx lr`
15
16			`.* :`
17			`.*: e1a0c00d mov ip, sp`
18			`.*: e92dd800 push {fp, ip, lr, pc}`
19			`.: eb000001 bl .`
20			`.*: e89d6800 ldm sp, {fp, sp, lr}`
21			`.*: e12fff1e bx lr`
22
23			`.* :`
24			`.*: e12fff1e bx lr`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [binutils-2.20.1/] [ld/] [testsuite/] [ld-arm/] [arm-static-app.d] - Blame information for rev 841