OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [binutils-2.20.1/] [ld/] [testsuite/] [ld-arm/] [farcall-mixed-app.d] - Blame information for rev 859

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 205 julius
 
2
tmpdir/farcall-mixed-app:     file format elf32-(little|big)arm
3
architecture: arm, flags 0x00000112:
4
EXEC_P, HAS_SYMS, D_PAGED
5
start address 0x.*
6
 
7
Disassembly of section .plt:
8
 
9
.* <.plt>:
10
 .*:    e52de004        push    {lr}            ; \(str lr, \[sp, #-4\]!\)
11
 .*:    e59fe004        ldr     lr, \[pc, #4\]  ; .* <_start-0x2c>
12
 .*:    e08fe00e        add     lr, pc, lr
13
 .*:    e5bef008        ldr     pc, \[lr, #8\]!
14
 .*:    .*
15
 .*:    4778            bx      pc
16
 .*:    46c0            nop                     ; \(mov r8, r8\)
17
 .*:    e28fc6.*        add     ip, pc, #.*
18
 .*:    e28cca.*        add     ip, ip, #.*     ; 0x.*
19
 .*:    e5bcf.*         ldr     pc, \[ip, #.*\]!.*
20
 .*:    e28fc6.*        add     ip, pc, #.*
21
 .*:    e28cca.*        add     ip, ip, #.*     ; 0x.*
22
 .*:    e5bcf.*         ldr     pc, \[ip, #.*\]!.*
23
 
24
Disassembly of section .text:
25
 
26
.* <_start>:
27
 .*:    e1a0c00d        mov     ip, sp
28
 .*:    e92dd800        push    {fp, ip, lr, pc}
29
 .*:    eb000008        bl      .* <__app_func_veneer>
30
 .*:    ebfffff5        bl      .* <_start-0x18>
31
 .*:    ebfffff1        bl      .* <_start-0x24>
32
 .*:    e89d6800        ldm     sp, {fp, sp, lr}
33
 .*:    e12fff1e        bx      lr
34
 .*:    e1a00000        nop                     ; \(mov r0, r0\)
35
 
36
.* :
37
 .*:    b500            push    {lr}
38
 .*:    f7ff ffd9       bl      8218 <_start-0x28>
39
 .*:    bd00            pop     {pc}
40
 .*:    4770            bx      lr
41
 .*:    46c0            nop                     ; \(mov r8, r8\)
42
 .*:    46c0            nop                     ; \(mov r8, r8\)
43
 .*:    46c0            nop                     ; \(mov r8, r8\)
44
 
45
.* <__app_func_veneer>:
46
 .*:    e51ff004        ldr     pc, \[pc, #-4\] ; 8274 <__app_func_veneer\+0x4>
47
 .*:    02100000        .word   0x02100000
48
 
49
Disassembly of section .far_arm:
50
 
51
.* :
52
 .*:    e1a0c00d        mov     ip, sp
53
 .*:    e92dd800        push    {fp, ip, lr, pc}
54
 .*:    eb00000a        bl      .* <__lib_func1_veneer>
55
 .*:    eb000007        bl      .* <__lib_func2_veneer>
56
 .*:    e89d6800        ldm     sp, {fp, sp, lr}
57
 .*:    e12fff1e        bx      lr
58
 .*:    e1a00000        nop                     ; \(mov r0, r0\)
59
 .*:    e1a00000        nop                     ; \(mov r0, r0\)
60
 
61
.* :
62
 .*:    e12fff1e        bx      lr
63
 .*:    e1a00000        nop                     ; \(mov r0, r0\)
64
 .*:    e1a00000        nop                     ; \(mov r0, r0\)
65
 .*:    e1a00000        nop                     ; \(mov r0, r0\)
66
 
67
.* <__lib_func2_veneer>:
68
 .*:    e51ff004        ldr     pc, \[pc, #-4\] ; 2100034 <__lib_func2_veneer\+0x4>
69
 .*:    0000821c        .word   0x0000821c
70
.* <__lib_func1_veneer>:
71
 .*:    e51ff004        ldr     pc, \[pc, #-4\] ; 210003c <__lib_func1_veneer\+0x4>
72
 .*:    00008228        .word   0x00008228
73
 
74
Disassembly of section .far_thumb:
75
 
76
.* :
77
 .*:    b500            push    {lr}
78
 .*:    f000 f805       bl      .* <__lib_func2_from_thumb>
79
 .*:    bd00            pop     {pc}
80
 .*:    4770            bx      lr
81
 .*:    46c0            nop                     ; \(mov r8, r8\)
82
 .*:    46c0            nop                     ; \(mov r8, r8\)
83
 .*:    46c0            nop                     ; \(mov r8, r8\)
84
 
85
.* <__lib_func2_from_thumb>:
86
 .*:    4778            bx      pc
87
 .*:    46c0            nop                     ; \(mov r8, r8\)
88
 .*:    e51ff004        ldr     pc, \[pc, #-4\] ; 2200018 <__lib_func2_from_thumb\+0x8>
89
 .*:    0000821c        .word   0x0000821c
90
 .*:    00000000        .word   0x00000000

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.