OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [binutils-2.20.1/] [ld/] [testsuite/] [ld-spu/] [icache1.d] - Blame information for rev 841

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 205 julius 
#source: icache1.s
2 
#ld: --soft-icache --num-lines=4 --non-ia-text --auto-overlay=tmpdir/icache1.lnk --auto-relink
3 
#objdump: -D
4 
 
5 
.* elf32-spu
6 
 
7 
 
8 
Disassembly of section \.text:
9 
 
10 
00000000 <_start>:
11 
.*      41 00 02 03     ilhu    \$3,4
12 
.*      60 88 00 03     iohl    \$3,4096        # 1000
13 
.*      32 00 03 80     br      24.*
14 
0000000c <__icache_br_handler>:
15 
   c:   00 00 00 00     stop
16 
00000010 <__icache_call_handler>:
17 
        \.\.\.
18 
  20:   00 04 08 00.*
19 
  24:   31 00 02 4b     brasl   \$75,10 <__icache_call_handler>
20 
  28:   a0 00 00 08.*
21 
  2c:   00 00 fc 80.*
22 
        \.\.\.
23 
 
24 
Disassembly of section \.data:
25 
 
26 
.* <.data>:
27 
.*      00 04 08 00     .*
28 
.*      00 04 0d 04     .*
29 
.*      00 04 0c 00     .*
30 
.*      00 08 10 00     .*
31 
 
32 
Disassembly of section \.bss:
33 
 
34 
.* <__icache_tag_array>:
35 
        \.\.\.
36 
 
37 
.* <__icache_rewrite_to>:
38 
        \.\.\.
39 
 
40 
.* <__icache_rewrite_from>:
41 
        \.\.\.
42 
 
43 
Disassembly of section \.ovl\.init:
44 
 
45 
00000400 <__icache_fileoff>:
46 
.*      00 00 00 00.*
47 
.*      00 00 02 00.*
48 
        \.\.\.
49 
 
50 
Disassembly of section \.ovly1:
51 
 
52 
00000400 <\.ovly1>:
53 
.*      ai      \$1,\$1,64      # 40
54 
.*      lqd     \$0,16\(\$1\)
55 
.*      bi      \$0
56 
        \.\.\.
57 
 
58 
Disassembly of section \.ovly2:
59 
 
60 
00000800 :
61 
.*      40 20 00 00     nop     \$0
62 
.*      24 00 40 80     stqd    \$0,16\(\$1\)
63 
.*      1c f0 00 81     ai      \$1,\$1,-64
64 
.*      24 00 00 81     stqd    \$1,0\(\$1\)
65 
.*      33 00 78 80     brsl    \$0,bd4 .*
66 
.*      33 00 7a 00     brsl    \$0,be4 .*
67 
        \.\.\.
68 
.*      32 00 17 80     br      bf4 .*
69 
        \.\.\.
70 
 bd0:   00 04 0d 04.*
71 
 bd4:   31 00 01 cb     brasl   \$75,c .*
72 
 bd8:   a0 00 08 10.*
73 
 bdc:   00 00 e6 00.*
74 
 be0:   00 04 0c 00.*
75 
 be4:   31 00 01 cb     brasl   \$75,c .*
76 
 be8:   a0 00 08 14.*
77 
 bec:   00 00 07 80.*
78 
 bf0:   00 04 04 00.*
79 
 bf4:   31 00 01 cb     brasl   \$75,c .*
80 
 bf8:   20 00 0b 38.*
81 
 bfc:   00 7f 0e 80.*
82 
 
83 
Disassembly of section \.ovly3:
84 
 
85 
00000c00 :
86 
        \.\.\.
87 
.*      35 00 00 00     bi      \$0
88 
 
89 
00000d04 :
90 
.*      1c e0 00 81     ai      \$1,\$1,-128
91 
.*      24 00 00 81     stqd    \$1,0\(\$1\)
92 
        \.\.\.
93 
.*      1c 20 00 81     ai      \$1,\$1,128     # 80
94 
.*      35 00 00 00     bi      \$0
95 
        \.\.\.
96 
 
97 
Disassembly of section \.ovly4:
98 
 
99 
00001000 :
100 
.*      24 00 40 80     stqd    \$0,16\(\$1\)
101 
.*      24 f8 00 81     stqd    \$1,-512\(\$1\)
102 
.*      1c 80 00 81     ai      \$1,\$1,-512
103 
.*      33 7f fe 80     brsl    \$0,1000        # 1000
104 
        \.\.\.
105 
.*      42 01 00 03     ila     \$3,200.*
106 
.*      18 00 c0 81     a       \$1,\$1,\$3
107 
.*      34 00 40 80     lqd     \$0,16\(\$1\)
108 
.*      35 00 00 00     bi      \$0
109 
        \.\.\.
110 
 
111 
Disassembly of section \.ovly5:
112 
 
113 
00000400 <\.ovly5>:
114 
        \.\.\.
115 
.*      42 01 00 03     ila     \$3,200 .*
116 
.*      18 00 c0 81     a       \$1,\$1,\$3
117 
.*      34 00 40 80     lqd     \$0,16\(\$1\)
118 
.*      30 00 fe 80     bra     7f4 .*
119 
        \.\.\.
120 
 7f0:   00 04 10 00.*
121 
 7f4:   31 00 01 cb     brasl   \$75,c .*
122 
 7f8:   a0 00 07 2c.*
123 
 7fc:   00 02 fe 80.*
124 
 
125 
Disassembly of section \.ovly6:
126 
 
127 
00000800 <\.ovly6>:
128 
.*      31 01 7a 80     brasl   \$0,bd4 .*
129 
.*      33 00 7c 00     brsl    \$0,be4 .*
130 
        \.\.\.
131 
.*      32 00 19 80     br      bf4 .*
132 
        \.\.\.
133 
 bd0:   00 08 10 00.*
134 
 bd4:   31 00 01 cb     brasl   \$75,c .*
135 
 bd8:   a0 00 08 00.*
136 
 bdc:   00 03 7a 80.*
137 
 be0:   00 08 10 00.*
138 
 be4:   31 00 01 cb     brasl   \$75,c .*
139 
 be8:   a0 00 08 04.*
140 
 bec:   00 00 83 80.*
141 
 bf0:   00 08 04 00.*
142 
 bf4:   31 00 01 cb     brasl   \$75,c .*
143 
 bf8:   20 00 0b 28.*
144 
 bfc:   00 7f 02 80.*
145 
 
146 
Disassembly of section \.ovly7:
147 
 
148 
00000c00 <\.ovly7>:
149 
.*      41 7f ff 83     ilhu    \$3,65535       # ffff
150 
.*      60 f8 30 03     iohl    \$3,61536       # f060
151 
.*      18 00 c0 84     a       \$4,\$1,\$3
152 
.*      00 20 00 00     lnop
153 
.*      04 00 02 01     ori     \$1,\$4,0
154 
.*      24 00 02 04     stqd    \$4,0\(\$4\)
155 
.*      33 00 77 80     brsl    \$0,fd4 .*
156 
.*      33 00 79 00     brsl    \$0,fe4 .*
157 
.*      34 00 00 81     lqd     \$1,0\(\$1\)
158 
        \.\.\.
159 
.*      32 00 16 00     br      ff4 .*
160 
        \.\.\.
161 
     fd0:       00 04 10 00.*
162 
     fd4:       31 00 01 cb     brasl   \$75,c .*
163 
     fd8:       a0 00 0c 18.*
164 
     fdc:       00 00 0a 80.*
165 
     fe0:       00 08 10 00.*
166 
     fe4:       31 00 01 cb     brasl   \$75,c .*
167 
     fe8:       a0 00 0c 1c.*
168 
     fec:       00 00 05 80.*
169 
     ff0:       00 08 08 00.*
170 
     ff4:       31 00 01 cb     brasl   \$75,c .*
171 
     ff8:       20 00 0f 44.*
172 
     ffc:       00 7f 01 80.*
173 
 
174 
Disassembly of section \.ovly8:
175 
 
176 
00001000 :
177 
.*      24 00 40 80     stqd    \$0,16\(\$1\)
178 
.*      24 f8 00 81     stqd    \$1,-512\(\$1\)
179 
.*      1c 80 00 81     ai      \$1,\$1,-512
180 
.*      31 02 7c 80     brasl   \$0,13e4 .*
181 
        \.\.\.
182 
.*      32 00 18 80     br      13f4 .*
183 
        \.\.\.
184 
    13e0:       00 04 0d 04.*
185 
    13e4:       31 00 01 cb     brasl   \$75,c .*
186 
    13e8:       a0 00 10 0c.*
187 
    13ec:       00 03 dc 00.*
188 
    13f0:       00 08 0c 00.*
189 
    13f4:       31 00 01 cb     brasl   \$75,c .*
190 
    13f8:       20 00 13 30.*
191 
    13fc:       00 7f 02 80.*
192 
 
193 
#pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.