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/* Definitions for GCC.  Part of the machine description for CRIS.

   Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008,

   2009 Free Software Foundation, Inc.

   Contributed by Axis Communications.  Written by Hans-Peter Nilsson.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify

it under the terms of the GNU General Public License as published by

the Free Software Foundation; either version 3, or (at your option)

any later version.

GCC is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

GNU General Public License for more details.

You should have received a copy of the GNU General Public License

along with GCC; see the file COPYING3.  If not see

<http://www.gnu.org/licenses/>.  */

/* After the first "Node:" comment comes all preprocessor directives and

   attached declarations described in the info files, the "Using and

   Porting GCC" manual (uapgcc), in the same order as found in the "Target

   macros" section in the gcc-2.9x CVS edition of 2000-03-17.  FIXME: Not

   really, but needs an update anyway.

   There is no generic copy-of-uapgcc comment, you'll have to see uapgcc

   for that.  If applicable, there is a CRIS-specific comment.  The order

   of macro definitions follow the order in the manual.  Every section in

   the manual (node in the info pages) has an introductory `Node:

   <subchapter>' comment.  If no macros are defined for a section, only

   the section-comment is present.  */

/* Note that other header files (e.g. config/elfos.h, config/linux.h,

   config/cris/linux.h and config/cris/aout.h) are responsible for lots of

   settings not repeated below.  This file contains general CRIS

   definitions and definitions for the cris-*-elf subtarget.  */

/* We don't want to use gcc_assert for everything, as that can be

   compiled out.  */

#define CRIS_ASSERT(x) \

 do { if (!(x)) internal_error ("CRIS-port assertion failed: " #x); } while (0)

/* Replacement for REG_P since it does not match SUBREGs.  Happens for

   testcase Axis-20000320 with gcc-2.9x.  */

#define REG_S_P(x) \

 (REG_P (x) || (GET_CODE (x) == SUBREG && REG_P (XEXP (x, 0))))

/* Last register in main register bank r0..r15.  */

#define CRIS_LAST_GENERAL_REGISTER 15

/* Descriptions of registers used for arguments.  */

#define CRIS_FIRST_ARG_REG 10

#define CRIS_MAX_ARGS_IN_REGS 4

/* See also *_REGNUM constants in cris.md.  */

/* Most of the time, we need the index into the register-names array.

   When passing debug-info, we need the real hardware register number.  */

#define CRIS_CANONICAL_SRP_REGNUM (16 + 11)

#define CRIS_CANONICAL_MOF_REGNUM (16 + 7)

/* We have CCR in all models including v10, but that's 16 bits, so let's

   prefer the DCCR number, which is a DMA pointer in pre-v8, so we'll

   never clash with it for GCC purposes.  */

#define CRIS_CANONICAL_CC0_REGNUM (16 + 13)

/* When generating PIC, these suffixes are added to the names of non-local

   functions when being output.  Contrary to other ports, we have offsets

   relative to the GOT, not the PC.  We might implement PC-relative PLT

   semantics later for the general case; they are used in some cases right

   now, such as MI thunks.  */

#define CRIS_GOTPLT_SUFFIX ":GOTPLT"

#define CRIS_PLT_GOTOFFSET_SUFFIX ":PLTG"

#define CRIS_PLT_PCOFFSET_SUFFIX ":PLT"

#define CRIS_FUNCTION_ARG_SIZE(MODE, TYPE)      \

  ((MODE) != BLKmode ? GET_MODE_SIZE (MODE)     \

   : (unsigned) int_size_in_bytes (TYPE))

/* Which CPU version this is.  The parsed and adjusted cris_cpu_str.  */

extern int cris_cpu_version;

/* Changing the order used to be necessary to put the fourth __make_dp

   argument (a DImode parameter) in registers, to fit with the libfunc

   parameter passing scheme used for intrinsic functions.  FIXME: Check

   performance and maybe remove definition from TARGET_LIBGCC2_CFLAGS now

   that it isn't strictly necessary.  We used to do this through

   TARGET_LIBGCC2_CFLAGS, but that became increasingly difficult as the

   parenthesis (that needed quoting) travels through several layers of

   make and shell invocations.  */

#ifdef IN_LIBGCC2

#define __make_dp(a,b,c,d) __cris_make_dp(d,a,b,c)

#endif

/* Node: Driver */

/* When using make with defaults.mak for Sun this will handily remove

   any "-target sun*" switches.  */

/* We need to override any previous definitions (linux.h) */

#undef WORD_SWITCH_TAKES_ARG

#define WORD_SWITCH_TAKES_ARG(STR)              \

 (DEFAULT_WORD_SWITCH_TAKES_ARG (STR)           \

  || !strcmp (STR, "target"))

/* Also provide canonical vN definitions when user specifies an alias.

   Note that -melf overrides -maout.  */

#define CPP_SPEC \

 "%{mtune=*:-D__tune_%* %{mtune=v*:-D__CRIS_arch_tune=%*}\

   %{mtune=etrax4:-D__tune_v3 -D__CRIS_arch_tune=3}\

   %{mtune=etrax100:-D__tune_v8 -D__CRIS_arch_tune=8}\

   %{mtune=svinto:-D__tune_v8 -D__CRIS_arch_tune=8}\

   %{mtune=etrax100lx:-D__tune_v10 -D__CRIS_arch_tune=10}\

   %{mtune=ng:-D__tune_v10 -D__CRIS_arch_tune=10}}\

  %{mcpu=*:-D__arch_%* %{mcpu=v*:-D__CRIS_arch_version=%*}\

   %{mcpu=etrax4:-D__arch_v3 -D__CRIS_arch_version=3}\

   %{mcpu=etrax100:-D__arch_v8 -D__CRIS_arch_version=8}\

   %{mcpu=svinto:-D__arch_v8 -D__CRIS_arch_version=8}\

   %{mcpu=etrax100lx:-D__arch_v10 -D__CRIS_arch_version=10}\

   %{mcpu=ng:-D__arch_v10 -D__CRIS_arch_version=10}}\

  %{march=*:-D__arch_%* %{march=v*:-D__CRIS_arch_version=%*}\

   %{march=etrax4:-D__arch_v3 -D__CRIS_arch_version=3}\

   %{march=etrax100:-D__arch_v8 -D__CRIS_arch_version=8}\

   %{march=svinto:-D__arch_v8 -D__CRIS_arch_version=8}\

   %{march=etrax100lx:-D__arch_v10 -D__CRIS_arch_version=10}\

   %{march=ng:-D__arch_v10 -D__CRIS_arch_version=10}}\

  %{metrax100:-D__arch__v8 -D__CRIS_arch_version=8}\

  %{metrax4:-D__arch__v3 -D__CRIS_arch_version=3}\

  %(cpp_subtarget)"

/* For the cris-*-elf subtarget.  */

#define CRIS_DEFAULT_TUNE "10"

#define CRIS_ARCH_CPP_DEFAULT

#define CRIS_DEFAULT_ASM_ARCH_OPTION ""

#ifdef TARGET_CPU_DEFAULT

#if TARGET_CPU_DEFAULT != 32 && TARGET_CPU_DEFAULT != 10

 #error "Due to '()'; e.g. '#define TARGET_CPU_DEFAULT (10)', stringize TARGET_CPU_DEFAULT isn't useful: update manually."

#endif

#if TARGET_CPU_DEFAULT == 32

#undef CRIS_DEFAULT_TUNE

#define CRIS_DEFAULT_TUNE "32"

/* To enable use of "generic" cris-axis-elf binutils, always pass the

   architecture option to GAS.  (We don't do this for non-v32.)  */

#undef CRIS_DEFAULT_ASM_ARCH_OPTION

#define CRIS_DEFAULT_ASM_ARCH_OPTION "--march=v32"

#endif

#undef CRIS_ARCH_CPP_DEFAULT

#define CRIS_ARCH_CPP_DEFAULT \

 "%{!march=*:\

   %{!metrax*:\

    %{!mcpu=*:\

     %{!mtune=*:-D__tune_v" CRIS_DEFAULT_TUNE "}\

     -D__arch_v"CRIS_DEFAULT_TUNE\

   " -D__CRIS_arch_version=" CRIS_DEFAULT_TUNE "}}}"

#endif

#define CRIS_CPP_SUBTARGET_SPEC \

 "%{mbest-lib-options:\

   %{!moverride-best-lib-options:\

   %{!march=*:%{!metrax*:%{!mcpu=*:\

      -D__tune_v" CRIS_DEFAULT_TUNE \

    " -D__CRIS_arch_tune=" CRIS_DEFAULT_TUNE "}}}}}"\

 CRIS_ARCH_CPP_DEFAULT

/* Remove those Sun-make "target" switches.  */

/* Override previous definitions (linux.h).  */

#undef CC1_SPEC

#define CC1_SPEC \

 "%{target*:}\

  %{metrax4:-march=v3}\

  %{metrax100:-march=v8}\

  %(cc1_subtarget)"

/* For the cris-*-elf subtarget.  */

#define CRIS_CC1_SUBTARGET_SPEC \

 "-melf\

  %{mbest-lib-options:\

   %{!moverride-best-lib-options:\

   %{!march=*:%{!mcpu=*:-mtune=v" CRIS_DEFAULT_TUNE\

       " -D__CRIS_arch_tune=" CRIS_DEFAULT_TUNE "}}\

    %{!finhibit-size-directive:\

      %{!fno-function-sections: -ffunction-sections}\

      %{!fno-data-sections: -fdata-sections}}}}"

/* This adds to CC1_SPEC.  */

#define CC1PLUS_SPEC ""

#ifdef HAVE_AS_NO_MUL_BUG_ABORT_OPTION

#define MAYBE_AS_NO_MUL_BUG_ABORT \

 "%{mno-mul-bug-workaround:-no-mul-bug-abort} "

#else

#define MAYBE_AS_NO_MUL_BUG_ABORT

#endif

/* Override previous definitions (linux.h).  */

#undef ASM_SPEC

#define ASM_SPEC \

 MAYBE_AS_NO_MUL_BUG_ABORT \

 "%{v:-v}\

 %(asm_subtarget)\

 %{march=*:%{cpu=*:%eDo not specify both -march=... and -mcpu=...}}\

 %{march=v32:--march=v32} %{mcpu=v32:--march=v32}"

/* For the cris-*-elf subtarget.  */

#define CRIS_ASM_SUBTARGET_SPEC \

 "--em=criself %{!march=*:%{!cpu=*:" CRIS_DEFAULT_ASM_ARCH_OPTION "}}"

/* FIXME: We should propagate the -melf option to make the criself

   "emulation" unless a linker script is provided (-T*), but I don't know

   how to do that if either of -Ttext, -Tdata or -Tbss is given but no

   linker script, as is usually the case.  Leave it to the user for the

   time being.

   Note that -melf overrides -maout except that a.out-compiled libraries

   are linked in (multilibbing).  The somewhat cryptic -rpath-link pair is

   to avoid *only* picking up the linux multilib subdir from the "-B./"

   option during build, while still giving it preference.  We'd need some

   %s-variant that checked for existence of some specific file.  */

/* Override previous definitions (svr4.h).  */

#undef LINK_SPEC

#define LINK_SPEC \

 "%{v:--verbose}\

  %(link_subtarget)"

/* For the cris-*-elf subtarget.  */

#define CRIS_LINK_SUBTARGET_SPEC \

 "-mcriself\

  %{sim2:%{!T*:-Tdata 0x4000000 -Tbss 0x8000000}}\

  %{!r:%{O2|O3: --gc-sections}}"

/* Which library to get.  The simulator uses a different library for

   the low-level syscalls (implementing the Linux syscall ABI instead

   of direct-iron accesses).  Default everything with the stub "nosys"

   library.  */

/* Override previous definitions (linux.h).  */

#undef LIB_SPEC

#define LIB_SPEC \

 "%{sim*:--start-group -lc -lsyslinux --end-group}\

  %{!sim*:%{g*:-lg}\

    %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} -lbsp}\

  -lnosys"

/* Linker startfile options; crt0 flavors.

   We need to remove any previous definition (elfos.h).  */

#undef STARTFILE_SPEC

#define STARTFILE_SPEC \

 "%{sim*:crt1.o%s}%{!sim*:crt0.o%s}\

  crti.o%s crtbegin.o%s"

#undef ENDFILE_SPEC

#define ENDFILE_SPEC "crtend.o%s crtn.o%s"

#define EXTRA_SPECS                             \

  {"cpp_subtarget", CRIS_CPP_SUBTARGET_SPEC},   \

  {"cc1_subtarget", CRIS_CC1_SUBTARGET_SPEC},   \

  {"asm_subtarget", CRIS_ASM_SUBTARGET_SPEC},   \

  {"link_subtarget", CRIS_LINK_SUBTARGET_SPEC}, \

  CRIS_SUBTARGET_EXTRA_SPECS

#define CRIS_SUBTARGET_EXTRA_SPECS

/* Node: Run-time Target */

#define TARGET_CPU_CPP_BUILTINS()               \

  do                                            \

    {                                           \

      builtin_define_std ("cris");              \

      builtin_define_std ("CRIS");              \

      builtin_define_std ("GNU_CRIS");          \

      builtin_define ("__CRIS_ABI_version=2");  \

      builtin_assert ("cpu=cris");              \

      builtin_assert ("machine=cris");          \

    }                                           \

  while (0)

/* This needs to be at least 32 bits.  */

extern int target_flags;

/* Previously controlled by target_flags.  */

#define TARGET_ELF 1

/* Previously controlled by target_flags.  Note that this is *not* set

   for -melinux.  */

#define TARGET_LINUX 0

/* For the cris-*-elf subtarget.  */

#define CRIS_SUBTARGET_DEFAULT 0

#define CRIS_CPU_BASE 0

#define CRIS_CPU_ETRAX4 3       /* Just lz added.  */

#define CRIS_CPU_SVINTO 8       /* Added swap, jsrc & Co., 32-bit accesses.  */

#define CRIS_CPU_NG 10          /* Added mul[su].  */

#define CRIS_CPU_V32 32         /* Major changes.  */

#ifndef TARGET_CPU_DEFAULT

#define TARGET_CPU_DEFAULT CRIS_CPU_BASE

#endif

/* Default target_flags if no switches specified.  */

#ifndef TARGET_DEFAULT

# if TARGET_CPU_DEFAULT == 32

#  define TARGET_DEFAULT \

 (MASK_STACK_ALIGN \

  + MASK_CONST_ALIGN + MASK_DATA_ALIGN \

  + MASK_PROLOGUE_EPILOGUE)

# else  /* 10 */

# define TARGET_DEFAULT \

 (MASK_SIDE_EFFECT_PREFIXES + MASK_STACK_ALIGN \

  + MASK_CONST_ALIGN + MASK_DATA_ALIGN \

  + MASK_PROLOGUE_EPILOGUE + MASK_MUL_BUG)

# endif

#endif

/* Local, providing a default for cris_cpu_version.  */

#define CRIS_DEFAULT_CPU_VERSION TARGET_CPU_DEFAULT

#define TARGET_HAS_MUL_INSNS (cris_cpu_version >= CRIS_CPU_NG)

#define TARGET_HAS_LZ (cris_cpu_version >= CRIS_CPU_ETRAX4)

#define TARGET_HAS_SWAP (cris_cpu_version >= CRIS_CPU_SVINTO)

#define TARGET_V32 (cris_cpu_version >= CRIS_CPU_V32)

#define CRIS_SUBTARGET_HANDLE_OPTION(x, y, z)

#define OVERRIDE_OPTIONS cris_override_options ()

#define OPTIMIZATION_OPTIONS(OPTIMIZE, SIZE)    \

  do                                            \

    {                                           \

      if ((OPTIMIZE) >= 2 || (SIZE))            \

        flag_omit_frame_pointer = 1;            \

    }                                           \

  while (0)

/* Node: Storage Layout */

#define BITS_BIG_ENDIAN 0

#define BYTES_BIG_ENDIAN 0

/* WORDS_BIG_ENDIAN is not defined in the hardware, but for consistency,

   we use little-endianness, and we may also be able to use

   post-increment on DImode indirect.  */

#define WORDS_BIG_ENDIAN 0

#define UNITS_PER_WORD 4

#define CRIS_PROMOTED_MODE(MODE, UNSIGNEDP, TYPE) \

 (GET_MODE_CLASS (MODE) == MODE_INT && GET_MODE_SIZE (MODE) < 4) \

  ? SImode : MODE

/* We will be using prototype promotion, so they will be 32 bit.  */

#define PARM_BOUNDARY 32

/* Stack boundary is guided by -mstack-align, -mno-stack-align,

   -malign.

   Old comment: (2.1: still valid in 2.7.2?)

    Note that to make this macro affect the alignment of stack

   locals, a fix was required, and special precautions when handling

   the stack pointer in various other macros (TARGET_ASM_FUNCTION_PROLOGUE

   et al) were required.  See file "function.c".  If you would just define

   this macro, it would only affect the builtin alloca and variable

   local data (non-ANSI, non-K&R, Gnu C extension).  */

#define STACK_BOUNDARY \

 (TARGET_STACK_ALIGN ? (TARGET_ALIGN_BY_32 ? 32 : 16) : 8)

#define FUNCTION_BOUNDARY 16

/* Do not change BIGGEST_ALIGNMENT (when optimizing), as it will affect

   strange places, at least in 2.1.  */

#define BIGGEST_ALIGNMENT 8

/* If -m16bit,  -m16-bit, -malign or -mdata-align,

   align everything to 16 bit.  */

#define DATA_ALIGNMENT(TYPE, BASIC_ALIGN)                       \

 (TARGET_DATA_ALIGN                                             \

  ? (TARGET_ALIGN_BY_32                                         \

     ? (BASIC_ALIGN < 32 ? 32 : BASIC_ALIGN)                    \

     : (BASIC_ALIGN < 16 ? 16 : BASIC_ALIGN)) : BASIC_ALIGN)

/* Note that CONSTANT_ALIGNMENT has the effect of making gcc believe that

   ALL references to constant stuff (in code segment, like strings) has

   this alignment.  That is a rather rushed assumption.  Luckily we do not

   care about the "alignment" operand to builtin memcpy (only place where

   it counts), so it doesn't affect any bad spots.  */

#define CONSTANT_ALIGNMENT(CONSTANT, BASIC_ALIGN)               \

 (TARGET_CONST_ALIGN                                            \

  ? (TARGET_ALIGN_BY_32                                         \

     ? (BASIC_ALIGN < 32 ? 32 : BASIC_ALIGN)                    \

     : (BASIC_ALIGN < 16 ? 16 : BASIC_ALIGN)) : BASIC_ALIGN)

/* FIXME: Define LOCAL_ALIGNMENT for word and dword or arrays and

   structures (if -mstack-align=), and check that it is good.  */

#define EMPTY_FIELD_BOUNDARY 8

#define STRUCTURE_SIZE_BOUNDARY 8

#define STRICT_ALIGNMENT 0

/* Remove any previous definition (elfos.h).

   ??? If it wasn't for all the other stuff that affects layout of

   structures and bit-fields, this could presumably cause incompatibility

   with other GNU/Linux ports (i.e. elfos.h users).  */

#undef PCC_BITFIELD_TYPE_MATTERS

/* This is only used for non-scalars.  Strange stuff happens to structs

   (FIXME: What?) if we use anything larger than largest actually used

   datum size, so lets make it 32.  The type "long long" will still work

   as usual.  We can still have DImode insns, but they will only be used

   for scalar data (i.e. long long).  */

#define MAX_FIXED_MODE_SIZE 32

/* Node: Type Layout */

/* Note that DOUBLE_TYPE_SIZE is not defined anymore, since the default

   value gives a 64-bit double, which is what we now use.  */

/* For compatibility and historical reasons, a char should be signed.  */

#define DEFAULT_SIGNED_CHAR 1

/* Note that WCHAR_TYPE_SIZE is used in cexp.y,

   where TARGET_SHORT is not available.  */

#undef WCHAR_TYPE

#define WCHAR_TYPE "long int"

#undef WCHAR_TYPE_SIZE

#define WCHAR_TYPE_SIZE 32

/* Node: Register Basics */

/*  We count all 16 non-special registers, SRP, a faked argument

    pointer register, MOF and CCR/DCCR.  */

#define FIRST_PSEUDO_REGISTER (16 + 1 + 1 + 1 + 1)

/* For CRIS, these are r15 (pc) and r14 (sp). Register r8 is used as a

   frame-pointer, but is not fixed.  SRP is not included in general

   registers and will not be used automatically.  All other special

   registers are fixed at the moment.  The faked argument pointer register

   is fixed too.  */

#define FIXED_REGISTERS \

 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0}

/* Register r9 is used for structure-address, r10-r13 for parameters,

   r10- for return values.  */

#define CALL_USED_REGISTERS \

 {0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1}

#define CONDITIONAL_REGISTER_USAGE cris_conditional_register_usage ()

/* Node: Allocation Order */

/* We need this on CRIS, because call-used regs should be used first,

   (so we don't need to push).  Else start using registers from r0 and up.

    This preference is mainly because if we put call-used-regs from r0

   and up, then we can't use movem to push the rest, (which have to be

   saved if we use them, and movem has to start with r0).

   Change here if you change which registers to use as call registers.

   The actual need to explicitly prefer call-used registers improved the

   situation a lot for 2.1, but might not actually be needed anymore.

   Still, this order reflects what GCC should find out by itself, so it

   probably does not hurt.

   Order of preference: Call-used-regs first, then r0 and up, last fp &

   sp & pc as fillers.

   Call-used regs in opposite order, so they will cause less conflict if

   a function has few args (<= 3) and it wants a scratch reg.

    Use struct-return address first, since very few functions use

   structure return values so it is likely to be available.  */

#define REG_ALLOC_ORDER \

 {9, 13, 12, 11, 10, 0, 1, 2, 3, 4, 5, 6, 7, 8, 14, 15, 17, 16, 18, 19}

/* Use MOF and ACR.  Prefer ACR before any other register.  Prefer MOF

   then SRP after saved registers.  The *after* is because they're only

   useful for storage, not for things being computed, which is

   apparently more common.  */

#define REG_ALLOC_ORDER_V32 \

 {15, 9, 13, 12, 11, 10, 0, 1, 2, 3, 4, 5, 6, 7, 8, 17, 16, 14, 18, 19}

/* Node: Values in Registers */

/* The VOIDmode test is so we can omit mode on anonymous insns.  FIXME:

   Still needed in 2.9x, at least for Axis-20000319.  */

#define HARD_REGNO_NREGS(REGNO, MODE)   \

 (MODE == VOIDmode \

  ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))

/* CRIS permits all registers to hold all modes.  Well, except for the

   condition-code register.  And we can't hold larger-than-register size

   modes in the last special register that can hold a full 32 bits.  */

#define HARD_REGNO_MODE_OK(REGNO, MODE)         \

 (((MODE) == CCmode                             \

   || (REGNO) != CRIS_CC0_REGNUM)               \

  && (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD    \

      || ((REGNO) != CRIS_MOF_REGNUM && (REGNO) != CRIS_ACR_REGNUM)))

/* Because CCmode isn't covered by the "narrower mode" statement in

   tm.texi, we can still say all modes are tieable despite not having an

   always 1 HARD_REGNO_MODE_OK.  */

#define MODES_TIEABLE_P(MODE1, MODE2) 1

/* Node: Leaf Functions */

/* (no definitions) */

/* Node: Stack Registers */

/* (no definitions) */

/* Node: Register Classes */

/* FIXME: A separate class for the return register would make sense.

   We need a separate register class to handle register allocation for

   ACR, since it can't be used for post-increment.

   It's not obvious, but having subunions of all movable-between

   register classes does really help register allocation.  */

enum reg_class

  {

    NO_REGS,

    ACR_REGS, MOF_REGS, CC0_REGS, SPECIAL_REGS,

    SPEC_ACR_REGS, GENNONACR_REGS,

    SPEC_GENNONACR_REGS, GENERAL_REGS,

    ALL_REGS,

    LIM_REG_CLASSES

  };

#define N_REG_CLASSES (int) LIM_REG_CLASSES

#define REG_CLASS_NAMES                                         \

  {"NO_REGS",                                                   \

   "ACR_REGS", "MOF_REGS", "CC0_REGS", "SPECIAL_REGS",          \

   "SPEC_ACR_REGS", "GENNONACR_REGS", "SPEC_GENNONACR_REGS",    \

   "GENERAL_REGS", "ALL_REGS"}

#define CRIS_SPECIAL_REGS_CONTENTS                                      \

 ((1 << CRIS_SRP_REGNUM) | (1 << CRIS_MOF_REGNUM) | (1 << CRIS_CC0_REGNUM))

/* Count in the faked argument register in GENERAL_REGS.  Keep out SRP.  */

#define REG_CLASS_CONTENTS                      \

  {                                             \

   {0},                                          \

   {1 << CRIS_ACR_REGNUM},                      \

   {1 << CRIS_MOF_REGNUM},                      \

   {1 << CRIS_CC0_REGNUM},                      \

   {CRIS_SPECIAL_REGS_CONTENTS},                \

   {CRIS_SPECIAL_REGS_CONTENTS                  \

    | (1 << CRIS_ACR_REGNUM)},                  \

   {(0xffff | (1 << CRIS_AP_REGNUM))            \

    & ~(1 << CRIS_ACR_REGNUM)},                 \

   {(0xffff | (1 << CRIS_AP_REGNUM)             \

    | CRIS_SPECIAL_REGS_CONTENTS)               \

    & ~(1 << CRIS_ACR_REGNUM)},                 \

   {0xffff | (1 << CRIS_AP_REGNUM)},            \

   {0xffff | (1 << CRIS_AP_REGNUM)              \

    | CRIS_SPECIAL_REGS_CONTENTS}               \

  }

#define REGNO_REG_CLASS(REGNO)                  \

  ((REGNO) == CRIS_ACR_REGNUM ? ACR_REGS :      \

   (REGNO) == CRIS_MOF_REGNUM ? MOF_REGS :      \

   (REGNO) == CRIS_CC0_REGNUM ? CC0_REGS :      \

   (REGNO) == CRIS_SRP_REGNUM ? SPECIAL_REGS :  \

   GENERAL_REGS)

#define BASE_REG_CLASS GENERAL_REGS

#define MODE_CODE_BASE_REG_CLASS(MODE, OCODE, ICODE)    \

  ((OCODE) != POST_INC ? BASE_REG_CLASS : GENNONACR_REGS)

#define INDEX_REG_CLASS GENERAL_REGS

#define IRA_COVER_CLASSES { GENERAL_REGS, SPECIAL_REGS, LIM_REG_CLASSES }

#define REG_CLASS_FROM_LETTER(C)                \

  (                                             \

   (C) == 'a' ? ACR_REGS :                      \

   (C) == 'b' ? GENNONACR_REGS :                \

   (C) == 'h' ? MOF_REGS :                      \

   (C) == 'x' ? SPECIAL_REGS :                  \

   (C) == 'c' ? CC0_REGS :                      \

   NO_REGS                                      \

  )

/* Since it uses reg_renumber, it is safe only once reg_renumber

   has been allocated, which happens in local-alloc.c.  */

#define REGNO_OK_FOR_BASE_P(REGNO)                                      \

 ((REGNO) <= CRIS_LAST_GENERAL_REGISTER                                 \

  || (REGNO) == ARG_POINTER_REGNUM                                      \

  || (unsigned) reg_renumber[REGNO] <= CRIS_LAST_GENERAL_REGISTER       \

  || (unsigned) reg_renumber[REGNO] == ARG_POINTER_REGNUM)

/* REGNO_OK_FOR_BASE_P seems to be obsolete wrt. this one, but not yet

   documented as such.  */

#define REGNO_MODE_CODE_OK_FOR_BASE_P(REGNO, MODE, OCODE, ICODE)        \

 (REGNO_OK_FOR_BASE_P (REGNO)                                           \

  && ((OCODE) != POST_INC                                               \

      || !((REGNO) == CRIS_ACR_REGNUM                                   \

           || (unsigned) reg_renumber[REGNO] == CRIS_ACR_REGNUM)))

/* See REGNO_OK_FOR_BASE_P.  */

#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)

/* It seems like gcc (2.7.2 and 2.9x of 2000-03-22) may send "NO_REGS" as

   the class for a constant (testcase: __Mul in arit.c).  To avoid forcing

   out a constant into the constant pool, we will trap this case and

   return something a bit more sane.  FIXME: Check if this is a bug.

   Beware that we must not "override" classes that can be specified as

   constraint letters, or else asm operands using them will fail when

   they need to be reloaded.  FIXME: Investigate whether that constitutes

   a bug.  */

#define PREFERRED_RELOAD_CLASS(X, CLASS)        \

 ((CLASS) != ACR_REGS                           \

  && (CLASS) != MOF_REGS                        \

  && (CLASS) != CC0_REGS                        \

  && (CLASS) != SPECIAL_REGS                    \

  ? GENERAL_REGS : (CLASS))

/* We can't move special registers to and from memory in smaller than

   word_mode.  We also can't move between special registers.  Luckily,

   -1, as returned by true_regnum for non-sub/registers, is valid as a

   parameter to our REGNO_REG_CLASS, returning GENERAL_REGS, so we get

   the effect that any X that isn't a special-register is treated as

   a non-empty intersection with GENERAL_REGS.  */

#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X)                          \

 ((((CLASS) == SPECIAL_REGS || (CLASS) == MOF_REGS)                     \

   && ((GET_MODE_SIZE (MODE) < 4 && MEM_P (X))                          \

       || !reg_classes_intersect_p (REGNO_REG_CLASS (true_regnum (X)),  \

                                    GENERAL_REGS)))                     \

   ? GENERAL_REGS : NO_REGS)

/* FIXME: Fix regrename.c; it should check validity of replacements,

   not just with a silly pass-specific macro.  We may miss some

   opportunities, but we must stop regrename from creating acr++.  */

#define HARD_REGNO_RENAME_OK(FROM, TO) ((TO) != CRIS_ACR_REGNUM)

/* For CRIS, this is always the size of MODE in words,

   since all registers are the same size.  To use omitted modes in

   patterns with reload constraints, you must say the widest size

   which is allowed for VOIDmode.

   FIXME:  Does that still apply for gcc-2.9x?  Keep poisoned until such

   patterns are added back.  News: 2001-03-16: Happens as early as the

   underscore-test.  */

#define CLASS_MAX_NREGS(CLASS, MODE)                                    \

 ((MODE) == VOIDmode                                                    \

  ? 1 /* + cris_fatal ("CLASS_MAX_NREGS with VOIDmode") */              \

  : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))

/* We are now out of letters; we could use ten more.  This forces us to

   use C-code in the 'md' file.  FIXME: Use some EXTRA_CONSTRAINTS.  */

#define CRIS_CONST_OK_FOR_LETTER_P(VALUE, C)            \

 (                                                      \

  /* MOVEQ, CMPQ, ANDQ, ORQ.  */                        \

  (C) == 'I' ? (VALUE) >= -32 && (VALUE) <= 31 :        \

  /* ADDQ, SUBQ.  */                                    \

  (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 :           \

  /* ASRQ, BTSTQ, LSRQ, LSLQ.  */                       \

  (C) == 'K' ? (VALUE) >= 0 && (VALUE) <= 31 :           \

  /* A 16-bit signed number.  */                        \

  (C) == 'L' ? (VALUE) >= -32768 && (VALUE) <= 32767 :  \

  /* The constant 0 for CLEAR.  */                      \

  (C) == 'M' ? (VALUE) == 0 :                            \

  /* A negative ADDQ or SUBQ.  */                       \

  (C) == 'N' ? (VALUE) >= -63 && (VALUE) < 0 :           \

  /* Quickened ints, QI and HI.  */                     \

  (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 65535          \

                && ((VALUE) >= (65535-31)               \

                    || ((VALUE) >= (255-31)             \

                        && (VALUE) <= 255 )) :          \

  /* A 16-bit number signed *or* unsigned.  */          \

  (C) == 'P' ? (VALUE) >= -32768 && (VALUE) <= 65535 :  \

  0)

#define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, S)  \

 (                                              \

  ((C) != 'K' || (S)[1] == 'c')                 \

   ? CRIS_CONST_OK_FOR_LETTER_P (VALUE, C) :    \

  ((C) == 'K' && (S)[1] == 'p')                 \

   ? exact_log2 (VALUE) >= 0 :                   \

  0)

#define CONSTRAINT_LEN(C, S) ((C) == 'K' ? 2 : DEFAULT_CONSTRAINT_LEN (C, S))

/* It is really simple to make up a 0.0; it is the same as int-0 in

   IEEE754.  */

#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)                  \

 ((C) == 'G' && ((VALUE) == CONST0_RTX (DFmode)                 \

                 || (VALUE) == CONST0_RTX (SFmode)))

/* We need this on cris to distinguish delay-slottable addressing modes.  */

#define EXTRA_CONSTRAINT(X, C)                  \

 (                                              \

  /* Slottable address mode?  */                \

  (C) == 'Q' ? EXTRA_CONSTRAINT_Q (X) :         \

  /* Operand to BDAP or BIAP?  */               \

  (C) == 'R' ? EXTRA_CONSTRAINT_R (X) :         \

  /* A local PIC symbol?  */                    \

  (C) == 'S' ? EXTRA_CONSTRAINT_S (X) :         \

  /* A three-address addressing-mode?  */       \

  (C) == 'T' ? EXTRA_CONSTRAINT_T (X) :         \

  /* A PLT symbol?  */                          \

  (C) == 'U' ? EXTRA_CONSTRAINT_U (X) :         \

  0)

#define EXTRA_MEMORY_CONSTRAINT(X, STR) ((X) == 'Q')

#define EXTRA_CONSTRAINT_Q(X)                           \

 (                                                      \

  /* Just an indirect register (happens to also be      \

     "all" slottable memory addressing modes not        \

     covered by other constraints, i.e. '>').  */       \

  MEM_P (X) && BASE_P (XEXP (X, 0))                      \

 )

#define EXTRA_CONSTRAINT_R(X)                                   \

 (                                                              \

  /* An operand to BDAP or BIAP:                                \

     A BIAP; r.S? */                                            \

  BIAP_INDEX_P (X)                                              \

  /* A [reg] or (int) [reg], maybe with post-increment.  */     \

  || BDAP_INDEX_P (X)                                           \

  || CONSTANT_INDEX_P (X)                                       \

 )

#define EXTRA_CONSTRAINT_T(X)                                           \

 (                                                                      \

  /* Memory three-address operand.  All are indirect-memory:  */        \

  MEM_P (X)                                                             \

  && ((MEM_P (XEXP (X, 0))                                               \

       /* Double indirect: [[reg]] or [[reg+]]?  */                     \

       && (BASE_OR_AUTOINCR_P (XEXP (XEXP (X, 0), 0))))                   \

      /* Just an explicit indirect reference: [const]?  */              \

      || CONSTANT_P (XEXP (X, 0))                                        \

      /* Something that is indexed; [...+...]?  */                      \