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[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [config/] [score/] [score.opt] - Blame information for rev 843

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; Options for the Sunnorth port of the compiler.
 
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; .
 
meb
Target RejectNegative Report InverseMask(LITTLE_ENDIAN)
Generate big-endian code
 
mel
Target RejectNegative Report Mask(LITTLE_ENDIAN)
Generate little-endian code
 
mnhwloop
Target RejectNegative Report Mask(NHWLOOP)
Disable bcnz instruction
 
muls
Target RejectNegative Report Mask(ULS)
Enable unaligned load/store instruction
 
mscore5
Target RejectNegative Report Mask(SCORE5)
Support SCORE 5 ISA
 
mscore5u
Target RejectNegative Report Mask(SCORE5U)
Support SCORE 5U ISA
 
mscore7
Target RejectNegative Report Mask(SCORE7)
Support SCORE 7 ISA
 
mscore7d
Target RejectNegative Report Mask(SCORE7D)
Support SCORE 7D ISA
 
mscore3
Target RejectNegative Report Mask(SCORE3)
Support SCORE 3 ISA
 
mscore3d
Target RejectNegative Report Mask(SCORE3D)
Support SCORE 3d ISA
 
march=
Target RejectNegative Joined
Specify the name of the target architecture

Line No.	Rev	Author	Line
1	282	jeremybenn	`; Options for the Sunnorth port of the compiler.`
2
3			`; Copyright (C) 2005, 2007 Free Software Foundation, Inc.`
4			`;`
5			`; This file is part of GCC.`
6			`;`
7			`; GCC is free software; you can redistribute it and/or modify it under`
8			`; the terms of the GNU General Public License as published by the Free`
9			`; Software Foundation; either version 3, or (at your option) any later`
10			`; version.`
11			`;`
12			`; GCC is distributed in the hope that it will be useful, but WITHOUT ANY`
13			`; WARRANTY; without even the implied warranty of MERCHANTABILITY or`
14			`; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
15			`; for more details.`
16			`;`
17			`; You should have received a copy of the GNU General Public License`
18			`; along with GCC; see the file COPYING3. If not see`
19			`; .`
20
21			`meb`
22			`Target RejectNegative Report InverseMask(LITTLE_ENDIAN)`
23			`Generate big-endian code`
24
25			`mel`
26			`Target RejectNegative Report Mask(LITTLE_ENDIAN)`
27			`Generate little-endian code`
28
29			`mnhwloop`
30			`Target RejectNegative Report Mask(NHWLOOP)`
31			`Disable bcnz instruction`
32
33			`muls`
34			`Target RejectNegative Report Mask(ULS)`
35			`Enable unaligned load/store instruction`
36
37			`mscore5`
38			`Target RejectNegative Report Mask(SCORE5)`
39			`Support SCORE 5 ISA`
40
41			`mscore5u`
42			`Target RejectNegative Report Mask(SCORE5U)`
43			`Support SCORE 5U ISA`
44
45			`mscore7`
46			`Target RejectNegative Report Mask(SCORE7)`
47			`Support SCORE 7 ISA`
48
49			`mscore7d`
50			`Target RejectNegative Report Mask(SCORE7D)`
51			`Support SCORE 7D ISA`
52
53			`mscore3`
54			`Target RejectNegative Report Mask(SCORE3)`
55			`Support SCORE 3 ISA`
56
57			`mscore3d`
58			`Target RejectNegative Report Mask(SCORE3D)`
59			`Support SCORE 3d ISA`
60
61			`march=`
62			`Target RejectNegative Joined`
63			`Specify the name of the target architecture`

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[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [config/] [score/] [score.opt] - Blame information for rev 843