OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.c-torture/] [compile/] [20001205-1.c] - Blame information for rev 859

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 297 jeremybenn
/* This does not work on m68hc11 due to the asm statement which forces
2
   two 'long' (32-bits) variables to go in registers.  */
3
/* { dg-do assemble } */
4
/* { dg-xfail-if "" { m6811-*-* m6812-*-* } { "*" } { "" } } */
5
 
6
static inline unsigned long rdfpcr(void)
7
{
8
        unsigned long tmp, ret;
9
        __asm__ ("" : "=r"(tmp), "=r"(ret));
10
        return ret;
11
}
12
 
13
static inline unsigned long
14
swcr_update_status(unsigned long swcr, unsigned long fpcr)
15
{
16
        swcr &= ~0x7e0000ul;
17
        swcr |= (fpcr >> 3) & 0x7e0000ul;
18
        return swcr;
19
}
20
 
21
unsigned long osf_getsysinfo(unsigned long flags)
22
{
23
        unsigned long w;
24
        w = swcr_update_status(flags, rdfpcr());
25
        return w;
26
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.