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[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.c-torture/] [compile/] [20010518-1.c] - Blame information for rev 859

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Line No. Rev Author Line
1 297 jeremybenn 
/* This was cut down from reload1.c in May 2001, was observed to cause
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   a bootstrap failure for powerpc-apple-darwin1.3.
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   Copyright (C) 2001  Free Software Foundation.  */
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enum insn_code
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{
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  CODE_FOR_extendqidi2 = 3,
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  CODE_FOR_nothing = 870
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};
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struct rtx_def;
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enum machine_mode
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{
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  VOIDmode,
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  MAX_MACHINE_MODE
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};
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typedef unsigned long long HARD_REG_ELT_TYPE;
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typedef HARD_REG_ELT_TYPE HARD_REG_SET[((77 + (8 * 8) - 1) / (8 * 8))];
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enum rtx_code
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{
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  UNKNOWN,
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  NIL,
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  REG,
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  LAST_AND_UNUSED_RTX_CODE = 256
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};
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typedef struct
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{
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  unsigned min_align:8;
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  unsigned base_after_vec:1;
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  unsigned min_after_vec:1;
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  unsigned max_after_vec:1;
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  unsigned min_after_base:1;
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  unsigned max_after_base:1;
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  unsigned offset_unsigned:1;
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  unsigned:2;
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  unsigned scale:8;
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}
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addr_diff_vec_flags;
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typedef union rtunion_def
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{
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  long long rtwint;
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  int rtint;
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  unsigned int rtuint;
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  const char *rtstr;
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  struct rtx_def *rtx;
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  struct rtvec_def *rtvec;
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  enum machine_mode rttype;
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  addr_diff_vec_flags rt_addr_diff_vec_flags;
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  struct cselib_val_struct *rt_cselib;
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  struct bitmap_head_def *rtbit;
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  union tree_node *rttree;
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  struct basic_block_def *bb;
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}
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rtunion;
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typedef struct rtx_def
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{
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  enum rtx_code code:16;
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  enum machine_mode mode:8;
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  unsigned int jump:1;
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  unsigned int call:1;
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  unsigned int unchanging:1;
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  unsigned int volatil:1;
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  unsigned int in_struct:1;
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  unsigned int used:1;
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  unsigned integrated:1;
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  unsigned frame_related:1;
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  rtunion fld[1];
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}
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 *rtx;
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enum reload_type
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{
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  RELOAD_FOR_INPUT, RELOAD_FOR_OUTPUT, RELOAD_FOR_INSN,
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  RELOAD_FOR_INPUT_ADDRESS, RELOAD_FOR_INPADDR_ADDRESS,
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  RELOAD_FOR_OUTPUT_ADDRESS, RELOAD_FOR_OUTADDR_ADDRESS,
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  RELOAD_FOR_OPERAND_ADDRESS, RELOAD_FOR_OPADDR_ADDR,
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  RELOAD_OTHER, RELOAD_FOR_OTHER_ADDRESS
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};
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struct reload
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{
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  rtx in;
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  rtx out;
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  //  enum reg_class class;
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  enum machine_mode inmode;
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  enum machine_mode outmode;
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  enum machine_mode mode;
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  unsigned int nregs;
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  int inc;
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  rtx in_reg;
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  rtx out_reg;
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  int regno;
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  rtx reg_rtx;
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  int opnum;
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  int secondary_in_reload;
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  int secondary_out_reload;
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  enum insn_code secondary_in_icode;
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  enum insn_code secondary_out_icode;
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  enum reload_type when_needed;
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  unsigned int optional:1;
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  unsigned int nocombine:1;
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  unsigned int secondary_p:1;
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  unsigned int nongroup:1;
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};
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struct insn_chain
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{
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  rtx insn;
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};
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extern int n_reloads;
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static short reload_order[(2 * 10 * (2 + 1))];
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int reload_spill_index[(2 * 10 * (2 + 1))];
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extern struct reload rld[(2 * 10 * (2 + 1))];
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static rtx *reg_last_reload_reg;
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static HARD_REG_SET reg_reloaded_valid;
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static HARD_REG_SET reg_reloaded_dead;
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static HARD_REG_SET reg_reloaded_died;
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static HARD_REG_SET reg_is_output_reload;
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extern const unsigned int mode_size[];
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extern int target_flags;
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static void
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emit_reload_insns (chain)
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     struct insn_chain *chain;
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{
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  rtx insn = chain->insn;
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  register int j;
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  rtx following_insn = (((insn)->fld[2]).rtx);
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  rtx before_insn = (((insn)->fld[1]).rtx);
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  for (j = 0; j < n_reloads; j++)
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    {
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      register int r = reload_order[j];
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      register int i = reload_spill_index[r];
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        {
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          rtx out = (((enum rtx_code) (rld[r].out)->code) == REG ? rld[r].out : rld[r].out_reg);
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          register int nregno = (((out)->fld[0]).rtuint);
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          if (nregno >= 77)
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            {
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              rtx src_reg, store_insn = (rtx) 0;
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              reg_last_reload_reg[nregno] = 0;
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              if (src_reg && ((enum rtx_code) (src_reg)->code) == REG && (((src_reg)->fld[0]).rtuint) < 77)
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                {
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                  int src_regno = (((src_reg)->fld[0]).rtuint);
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                  int nr =
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                    (((src_regno) >= 32
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                      && (src_regno) <=
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                      63) ? (((mode_size[(int) (rld[r].mode)]) + 8 -
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                              1) / 8) : (((mode_size[(int) (rld[r].mode)]) +
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                                          (!(target_flags & 0x00000020) ? 4 :
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                                           8) - 1) / (!(target_flags & 0x00000020) ? 4 : 8)));
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                  rtx note = 0;
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                  while (nr-- > 0)
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                    {
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                      ((reg_reloaded_dead)
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                       [(src_regno + nr) / ((unsigned) (8 * 8))] &=
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                       ~(((HARD_REG_ELT_TYPE) (1)) << ((src_regno + nr) % ((unsigned) (8 * 8)))));
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                      ((reg_reloaded_valid)
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                       [(src_regno + nr) / ((unsigned) (8 * 8))] |=
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                       ((HARD_REG_ELT_TYPE) (1)) << ((src_regno + nr) % ((unsigned) (8 * 8))));
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                      ((reg_is_output_reload)
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                       [(src_regno + nr) / ((unsigned) (8 * 8))] |=
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                       ((HARD_REG_ELT_TYPE) (1)) << ((src_regno + nr) % ((unsigned) (8 * 8))));
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                      if (note)
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                        ((reg_reloaded_died)
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                         [(src_regno) / ((unsigned) (8 * 8))] |=
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                         ((HARD_REG_ELT_TYPE) (1)) << ((src_regno) % ((unsigned) (8 * 8))));
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                      else
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                        ((reg_reloaded_died)
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                         [(src_regno) / ((unsigned) (8 * 8))] &=
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                         ~(((HARD_REG_ELT_TYPE) (1)) << ((src_regno) % ((unsigned) (8 * 8)))));
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                    }
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                  reg_last_reload_reg[nregno] = src_reg;
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                }
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            }
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          else
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            {
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              int num_regs =
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                (((nregno) >= 32
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                  && (nregno) <=
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                  63)
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                 ? (((mode_size
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                      [(int) (((enum machine_mode) (rld[r].out)->mode))]) +
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                     8 -
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                     1) /
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                    8)
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                 : (((mode_size
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                      [(int) (((enum machine_mode) (rld[r].out)->mode))]) +
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                     (!(target_flags & 0x00000020) ? 4 : 8) - 1) / (!(target_flags & 0x00000020) ? 4 : 8)));
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              while (num_regs-- > 0)
201 
                reg_last_reload_reg[nregno + num_regs] = 0;
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            }
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        }
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    }
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}

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