OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.c-torture/] [execute/] [921202-1.c] - Blame information for rev 826

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 297 jeremybenn
#ifndef STACK_SIZE
2
#define VLEN    2055
3
#else
4
#define VLEN ((STACK_SIZE/16) - 1)
5
#endif
6
main ()
7
{
8
  long dx[VLEN];
9
  long dy[VLEN];
10
  long s1[VLEN];
11
  int cyx, cyy;
12
  int i;
13
  long size;
14
 
15
  for (;;)
16
    {
17
      size = VLEN;
18
      mpn_random2 (s1, size);
19
 
20
      for (i = 0; i < 1; i++)
21
        ;
22
 
23
      dy[size] = 0x12345678;
24
 
25
      for (i = 0; i < 1; i++)
26
        cyy = mpn_mul_1 (dy, s1, size);
27
 
28
      if (cyx != cyy || mpn_cmp (dx, dy, size + 1) != 0 || dx[size] != 0x12345678)
29
        {
30
          foo ("", 8, cyy); mpn_print (dy, size);
31
        }
32
      exxit();
33
    }
34
}
35
 
36
foo (){}
37
mpn_mul_1(){}
38
mpn_print (){}
39
mpn_random2(){}
40
mpn_cmp(){}
41
exxit(){exit(0);}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.