OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.c-torture/] [execute/] [pr38533.c] - Blame information for rev 826

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 297 jeremybenn 
/* PR middle-end/38533 */
2 
 
3 
#define A asm volatile ("" : "=r" (f) : "0" (0)); e |= f;
4 
#define B A A A A A A A A A A A
5 
#define C B B B B B B B B B B B
6 
 
7 
int
8 
foo (void)
9 
{
10 
  int e = 0, f;
11 
  C C B B B B B A A A A A A
12 
  return e;
13 
}
14 
 
15 
int
16 
main (void)
17 
{
18 
  if (foo ())
19 
    __builtin_abort ();
20 
  return 0;
21 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.