OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.dg/] [20031202-1.c] - Blame information for rev 826

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 298 jeremybenn
/* { dg-do run } */
2
/* { dg-options "-O2" } */
3
/* { dg-options "-O2 -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
4
 
5
extern void abort (void);
6
extern void exit (int);
7
 
8
struct A { char p[6]; } __attribute__((packed));
9
struct B {
10
    struct A a;
11
    void * const b;
12
    struct A const * const c;
13
    struct A const *d;
14
};
15
 
16
char v;
17
 
18
int __attribute__((noinline))
19
foo (struct B *b)
20
{
21
  int i;
22
  for (i = 0; i < 6; ++i)
23
    if (b->a.p[i])
24
      abort ();
25
  if (b->b != &v || b->c || b->d)
26
    abort ();
27
  return 12;
28
}
29
 
30
int __attribute__((noinline))
31
bar (void *x)
32
{
33
  __asm __volatile ("" : "=r" (x) : "0" (x));
34
  struct B y = { .b = x, .c = (void *) 0 };
35
  return foo (&y) + 1;
36
}
37
 
38
int
39
main (void)
40
{
41
  if (bar (&v) != 13)
42
    abort ();
43
  exit (0);
44
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.