OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.dg/] [tree-ssa/] [20030920-1.c] - Blame information for rev 826

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 298 jeremybenn
/* Jump threading was creating FALLTHRU edges out of blocks ending in
2
   GOTO_EXPR.  */
3
 
4
extern int frame_pointer_needed;
5
 
6
struct value_data_entry
7
{
8
  unsigned int mode;
9
  unsigned int oldest_regno;
10
  unsigned int next_regno;
11
};
12
 
13
struct value_data
14
{
15
  struct value_data_entry e[53];
16
  unsigned int max_value_regs;
17
};
18
 
19
struct rtx_def
20
{
21
  unsigned int code: 16;
22
  unsigned int mode : 8;
23
  unsigned int jump : 1;
24
  unsigned int call : 1;
25
  unsigned int unchanging : 1;
26
  unsigned int volatil : 1;
27
  unsigned int in_struct : 1;
28
  unsigned int used : 1;
29
  unsigned integrated : 1;
30
  unsigned frame_related : 1;
31
  int fld[1];
32
};
33
 
34
typedef struct rtx_def *rtx;
35
 
36
enum machine_mode { VOIDmode, BImode, QImode, HImode, SImode, DImode,
37
    TImode, OImode, PQImode, PHImode, PSImode, PDImode, QFmode, HFmode,
38
    TQFmode, SFmode, DFmode, XFmode, TFmode, QCmode, HCmode, SCmode,
39
    DCmode, XCmode, TCmode, CQImode, CHImode, CSImode, CDImode, CTImode,
40
    COImode, V1DImode, V2QImode, V2HImode, V2SImode, V2DImode, V4QImode,
41
    V4HImode, V4SImode, V4DImode, V8QImode, V8HImode, V8SImode, V8DImode,
42
    V16QImode, V2HFmode, V2SFmode, V2DFmode, V4HFmode, V4SFmode, V4DFmode,
43
    V8HFmode, V8SFmode, V8DFmode, V16SFmode, BLKmode, CCmode, CCGCmode,
44
    CCGOCmode, CCNOmode, CCZmode, CCFPmode, CCFPUmode, MAX_MACHINE_MODE };
45
 
46
enum mode_class { MODE_RANDOM, MODE_INT, MODE_FLOAT, MODE_PARTIAL_INT, MODE_CC,
47
    MODE_COMPLEX_INT, MODE_COMPLEX_FLOAT,
48
    MODE_VECTOR_INT, MODE_VECTOR_FLOAT,
49
    MAX_MODE_CLASS};
50
 
51
extern const unsigned char mode_size[(int) MAX_MACHINE_MODE];
52
extern const enum mode_class mode_class[(int) MAX_MACHINE_MODE];
53
 
54
extern int target_flags;
55
 
56
static void
57
copy_value (rtx dest, rtx src, struct value_data *vd)
58
{
59
  unsigned int dr = (((dest)->fld[0]));
60
  unsigned int sr = (((src)->fld[0]));
61
  unsigned int dn, sn;
62
  unsigned int i;
63
 
64
 
65
 
66
  if (sr == dr)
67
    return;
68
 
69
 
70
 
71
  if (dr == 7)
72
    return;
73
 
74
 
75
  if (frame_pointer_needed && dr == 6)
76
    return;
77
 
78
 
79
  dn = (((dr) >= 8 && (dr) <= (8 + 7)) || (((dr) >= (20 + 1) && (dr) <= ((20 + 1) + 7)) || ((dr) >= (((((((20 + 1) + 7) + 1) + 7) + 1) + 7) + 1) && (dr) <= ((((((((20 + 1) + 7) + 1) + 7) + 1) + 7) + 1) + 7))) || ((dr) >= (((20 + 1) + 7) + 1) && (dr) <= ((((20 + 1) + 7) + 1) + 7)) ? (((mode_class[(int) (((enum machine_mode) (dest)->mode))]) == MODE_COMPLEX_INT || (mode_class[(int) (((enum machine_mode) (dest)->mode))]) == MODE_COMPLEX_FLOAT) ? 2 : 1) : ((((enum machine_mode) (dest)->mode)) == TFmode ? ((target_flags & 0x00100000) ? 2 : 3) : (((enum machine_mode) (dest)->mode)) == TCmode ? ((target_flags & 0x00100000) ? 4 : 6) : (((mode_size[(int) (((enum machine_mode) (dest)->mode))]) + ((target_flags & 0x00100000) ? 8 : 4) - 1) / ((target_flags & 0x00100000) ? 8 : 4))));
80
  sn = (((sr) >= 8 && (sr) <= (8 + 7)) || (((sr) >= (20 + 1) && (sr) <= ((20 + 1) + 7)) || ((sr) >= (((((((20 + 1) + 7) + 1) + 7) + 1) + 7) + 1) && (sr) <= ((((((((20 + 1) + 7) + 1) + 7) + 1) + 7) + 1) + 7))) || ((sr) >= (((20 + 1) + 7) + 1) && (sr) <= ((((20 + 1) + 7) + 1) + 7)) ? (((mode_class[(int) (((enum machine_mode) (dest)->mode))]) == MODE_COMPLEX_INT || (mode_class[(int) (((enum machine_mode) (dest)->mode))]) == MODE_COMPLEX_FLOAT) ? 2 : 1) : ((((enum machine_mode) (dest)->mode)) == TFmode ? ((target_flags & 0x00100000) ? 2 : 3) : (((enum machine_mode) (dest)->mode)) == TCmode ? ((target_flags & 0x00100000) ? 4 : 6) : (((mode_size[(int) (((enum machine_mode) (dest)->mode))]) + ((target_flags & 0x00100000) ? 8 : 4) - 1) / ((target_flags & 0x00100000) ? 8 : 4))));
81
  if ((dr > sr && dr < sr + sn)
82
      || (sr > dr && sr < dr + dn))
83
    return;
84
 
85
 
86
 
87
 
88
  if (vd->e[sr].mode == VOIDmode)
89
    set_value_regno (sr, vd->e[dr].mode, vd);
90
  else if (sn < (unsigned int) (((sr) >= 8 && (sr) <= (8 + 7)) || (((sr) >= (20 + 1) && (sr) <= ((20 + 1) + 7)) || ((sr) >= (((((((20 + 1) + 7) + 1) + 7) + 1) + 7) + 1) && (sr) <= ((((((((20 + 1) + 7) + 1) + 7) + 1) + 7) + 1) + 7))) || ((sr) >= (((20 + 1) + 7) + 1) && (sr) <= ((((20 + 1) + 7) + 1) + 7)) ? (((mode_class[(int) (vd->e[sr].mode)]) == MODE_COMPLEX_INT || (mode_class[(int) (vd->e[sr].mode)]) == MODE_COMPLEX_FLOAT) ? 2 : 1) : ((vd->e[sr].mode) == TFmode ? ((target_flags & 0x00100000) ? 2 : 3) : (vd->e[sr].mode) == TCmode ? ((target_flags & 0x00100000) ? 4 : 6) : (((mode_size[(int) (vd->e[sr].mode)]) + ((target_flags & 0x00100000) ? 8 : 4) - 1) / ((target_flags & 0x00100000) ? 8 : 4))))
91
    && ((mode_size[(int) (vd->e[sr].mode)]) > ((target_flags & 0x00100000) ? 8 : 4)
92
        ? 0 : 0))
93
    return;
94
 
95
 
96
 
97
 
98
  else if (sn > (unsigned int) (((sr) >= 8 && (sr) <= (8 + 7)) || (((sr) >= (20 + 1) && (sr) <= ((20 + 1) + 7)) || ((sr) >= (((((((20 + 1) + 7) + 1) + 7) + 1) + 7) + 1) && (sr) <= ((((((((20 + 1) + 7) + 1) + 7) + 1) + 7) + 1) + 7))) || ((sr) >= (((20 + 1) + 7) + 1) && (sr) <= ((((20 + 1) + 7) + 1) + 7)) ? (((mode_class[(int) (vd->e[sr].mode)]) == MODE_COMPLEX_INT || (mode_class[(int) (vd->e[sr].mode)]) == MODE_COMPLEX_FLOAT) ? 2 : 1) : ((vd->e[sr].mode) == TFmode ? ((target_flags & 0x00100000) ? 2 : 3) : (vd->e[sr].mode) == TCmode ? ((target_flags & 0x00100000) ? 4 : 6) : (((mode_size[(int) (vd->e[sr].mode)]) + ((target_flags & 0x00100000) ? 8 : 4) - 1) / ((target_flags & 0x00100000) ? 8 : 4)))))
99
    return;
100
 
101
 
102
 
103
  vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
104
 
105
  for (i = sr; vd->e[i].next_regno != (~(unsigned int) 0); i = vd->e[i].next_regno)
106
    continue;
107
  vd->e[i].next_regno = dr;
108
 
109
 
110
  validate_value_data (vd);
111
 
112
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.