OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [arm/] [scd42-3.c] - Blame information for rev 826

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 313 jeremybenn
/* Verify that ldr is preferred on XScale for loading a 3 or 4 byte constant. */
2
/* { dg-do compile } */
3
/* { dg-options "-mcpu=xscale -O" } */
4
 
5
unsigned load4(void) __attribute__ ((naked));
6
unsigned load4(void)
7
{
8
    /* Best code would be:
9
       ldr r0, =65809
10
       mov pc, lr */
11
 
12
    return 65809;
13
}
14
 
15
/* { dg-final { scan-assembler "ldr\[   ].*" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.