OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [cris/] [torture/] [pr24750-2.c] - Blame information for rev 816

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 316 jeremybenn
/* As the invalid insn in this test got as far as to the target output
2
   code and was "near enough" to output invalid assembly-code, we need
3
   to pass it through the assembler as well.
4
   { dg-do assemble } */
5
 
6
int
7
f (short *a, char *y)
8
{
9
  __asm__ ("" : : :
10
#ifndef __PIC__
11
           "r0",
12
#endif
13
           "r1", "r2", "r3", "r4", "r5", "r6", "r7",
14
           /* Register R8 is frame-pointer, and we don't have a means
15
              to not clobber it for the test-runs that don't eliminate
16
              it.  But that's ok; we have enough general-register
17
              pressure to repeat the bug without that.  */
18
           "r9", "r10", "r11", "r12", "r13");
19
  return y[*a];
20
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.