OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [args-3.c] - Blame information for rev 826

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 321 jeremybenn
/* __mips, and related defines, guarantee that certain assembly
2
   instructions can be used.  Check a few examples.  */
3
/* { dg-do run } */
4
/* { dg-skip-if "" { *-*-* } { "-mflip-mips16" } { "" } } */
5
extern void abort (void);
6
extern void exit (int);
7
 
8
typedef int int32 __attribute__ ((mode (SI)));
9
typedef int int64 __attribute__ ((mode (DI)));
10
int foo (float inf, int64 in64, int32 in32)
11
{
12
  int64 res64;
13
  int32 res32;
14
 
15
#if __mips != 1 && defined (__mips_hard_float) && !defined (__mips16)
16
  __asm__ ("trunc.w.s %0, %1" : "=f" (res32) : "f" (inf));
17
  if (res32 != 11)
18
    abort ();
19
#endif
20
 
21
#if defined (__mips64)
22
  __asm__ ("daddu %0, %1, %1" : "=r" (res64) : "r" (in64));
23
  if (res64 != 50)
24
    abort ();
25
#endif
26
 
27
#if (__mips == 4 || __mips == 32 || __mips == 64) && !defined (__mips16)
28
  __asm__ ("move %0,%.\n\tmovn %0,%1,%2"
29
           : "=&r" (res32) : "r" (in32), "r" (in64 != 0));
30
  if (res32 != 60)
31
    abort ();
32
#endif
33
}
34
 
35
int main ()
36
{
37
  foo (11.4f, 25, 60);
38
  exit (0);
39
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.