URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [dspr2-MULTU.c] - Blame information for rev 816

Go to most recent revision | Details | Compare with Previous | View Log


/* Test MIPS32 DSP REV 2 MULTU instruction.  Tune for a CPU that has
   pipelined multu.  */
/* { dg-do compile } */
/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */
 
/* { dg-final { scan-assembler "\tmultu\t" } } */
/* { dg-final { scan-assembler "ac1" } } */
/* { dg-final { scan-assembler "ac2" } } */
 
typedef unsigned long long a64;
 
NOMIPS16 a64 test (a64 *a, unsigned int *b, unsigned int *c)
{
  a[0] = (a64) b[0] * c[0];
  a[1] = (a64) b[1] * c[1];
}

Line No.	Rev	Author	Line
1	321	jeremybenn	`/* Test MIPS32 DSP REV 2 MULTU instruction. Tune for a CPU that has`
2			`pipelined multu. */`
3			`/* { dg-do compile } */`
4			`/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */`
5
6			`/* { dg-final { scan-assembler "\tmultu\t" } } */`
7			`/* { dg-final { scan-assembler "ac1" } } */`
8			`/* { dg-final { scan-assembler "ac2" } } */`
9
10			`typedef unsigned long long a64;`
11
12			`NOMIPS16 a64 test (a64 a, unsigned int b, unsigned int *c)`
13			`{`
14			`a[0] = (a64) b[0] * c[0];`
15			`a[1] = (a64) b[1] * c[1];`
16			`}`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [dspr2-MULTU.c] - Blame information for rev 816