URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [extend-2.c] - Blame information for rev 321

Go to most recent revision | Details | Compare with Previous | View Log


/* Check the shift_shift alternative of the AND patterns.  */
/* { dg-do compile } */
/* { dg-options "-O isa_rev<=1 -mgp64" } */
/* { dg-final { scan-assembler "\tdsrl\t" } } */
/* { dg-final { scan-assembler "\tdsll\t" } } */
/* { dg-final { scan-assembler-not "\td?ext\t" } } */
 
unsigned long long
f (unsigned long long i)
{
  return i & 0xffffffff;
}

Line No.	Rev	Author	Line
1	321	jeremybenn	`/* Check the shift_shift alternative of the AND patterns. */`
2			`/* { dg-do compile } */`
3			`/* { dg-options "-O isa_rev<=1 -mgp64" } */`
4			`/* { dg-final { scan-assembler "\tdsrl\t" } } */`
5			`/* { dg-final { scan-assembler "\tdsll\t" } } */`
6			`/* { dg-final { scan-assembler-not "\td?ext\t" } } */`
7
8			`unsigned long long`
9			`f (unsigned long long i)`
10			`{`
11			`return i & 0xffffffff;`
12			`}`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [extend-2.c] - Blame information for rev 321