OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [no-smartmips-ror-1.c] - Blame information for rev 816

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 321 jeremybenn
/* { dg-do compile } */
2
/* { dg-options "-O -mno-smartmips -march=mips32" } */
3
 
4
NOMIPS16 int rotate_left (unsigned a, unsigned s)
5
{
6
  return (a << s) | (a >> (32 - s));
7
}
8
/* { dg-final { scan-assembler-not "\tror\t" } } */
9
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.