OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [20020118-1.c] - Blame information for rev 826

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 322 jeremybenn
/* { dg-do run { target powerpc*-*-* } }*/
2
/* VxWorks only guarantees 64 bits of alignment (STACK_BOUNDARY == 64).  */
3
/* { dg-skip-if "" { "powerpc*-*-vxworks*" } { "*" } { "" } } */
4
 
5
/* Test local alignment.  Test new target macro STARTING_FRAME_PHASE.  */
6
/* Origin: Aldy Hernandez <aldyh@redhat.com>.  */
7
 
8
extern void abort(void);
9
 
10
int main ()
11
{
12
  int darisa[4] __attribute__((aligned(16))) ;
13
  int *stephanie = (int *) darisa;
14
 
15
  if ((unsigned long) stephanie % 16 != 0)
16
    abort ();
17
 
18
  return 0;
19
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.