URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [altivec-19.c] - Blame information for rev 826

Details | Compare with Previous | View Log


/* { dg-do compile { target powerpc*-*-* } } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec" } */
/* { dg-final { scan-assembler "dst" } } */
 
void foo ( char* image )
{
  while ( 1 )
    {
      __builtin_altivec_dst( (void *)( (long)image & ~0x0f ), 0, 0 );
      image += 48;
    }
}

Line No.	Rev	Author	Line
1	322	jeremybenn	`/* { dg-do compile { target powerpc--* } } */`
2			`/* { dg-require-effective-target powerpc_altivec_ok } */`
3			`/* { dg-options "-maltivec" } */`
4			`/* { dg-final { scan-assembler "dst" } } */`
5
6			`void foo ( char* image )`
7			`{`
8			`while ( 1 )`
9			`{`
10			`__builtin_altivec_dst( (void *)( (long)image & ~0x0f ), 0, 0 );`
11			`image += 48;`
12			`}`
13			`}`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [altivec-19.c] - Blame information for rev 826