OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [leaf.c] - Blame information for rev 826

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 322 jeremybenn
/* { dg-do compile { target rs6000-*-* } }  */
2
/* { dg-options "-O2" } */
3
/* { dg-final { scan-assembler-not "\tstwu 1,-\[0-9\]*(1)\n" } } */
4
 
5
int Leaf (int i)
6
{
7
  return i + 1;
8
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.