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[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [sh/] [sh2a-bor.c] - Blame information for rev 826

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Line No. Rev Author Line
1 325 jeremybenn 
/* Testcase to check generation of a SH2A specific instruction for
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   "BOR.B #imm3, @(disp12, Rn)".  */
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/* { dg-do assemble {target sh*-*-*}}  */
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/* { dg-options "-O1 -mbitops" } */
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/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single -m2a-single-only" }  */
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/* { dg-final { scan-assembler "bor.b"} }  */
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volatile struct
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{
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  union
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  {
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    unsigned char BYTE;
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    struct
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    {
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      unsigned char BIT7:1;
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      unsigned char BIT6:1;
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      unsigned char BIT5:1;
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      unsigned char BIT4:1;
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      unsigned char BIT3:1;
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      unsigned char BIT2:1;
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      unsigned char BIT1:1;
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      unsigned char BIT0:1;
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    }
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    BIT;
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  }
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  ICR0;
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}
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USRSTR;
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volatile union t_IOR
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{
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  unsigned short WORD;
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  struct
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  {
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    unsigned char IOR15:1;
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    unsigned char IOR14:1;
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    unsigned char IOR13:1;
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    unsigned char IOR12:1;
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    unsigned char IOR11:1;
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    unsigned char IOR10:1;
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    unsigned char IOR9:1;
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    unsigned char IOR8:1;
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    unsigned char IOR7:1;
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    unsigned char IOR6:1;
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    unsigned char IOR5:1;
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    unsigned char IOR4:1;
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    unsigned char IOR3:1;
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    unsigned char IOR2:1;
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    unsigned char IOR1:1;
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    unsigned char IOR0:1;
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  }
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  BIT;
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}
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PORT;
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int
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main ()
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{
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  volatile unsigned char a;
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  /* Instruction generated is BOR.B #imm3, @(disp12, Rn)  */
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  USRSTR.ICR0.BIT.BIT3 = USRSTR.ICR0.BIT.BIT4 | USRSTR.ICR0.BIT.BIT1;
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  USRSTR.ICR0.BIT.BIT2 = USRSTR.ICR0.BIT.BIT6 | USRSTR.ICR0.BIT.BIT6;
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  USRSTR.ICR0.BIT.BIT4 = USRSTR.ICR0.BIT.BIT2 | USRSTR.ICR0.BIT.BIT4;
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  USRSTR.ICR0.BIT.BIT6 = USRSTR.ICR0.BIT.BIT1 | USRSTR.ICR0.BIT.BIT3;
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  a = USRSTR.ICR0.BIT.BIT0 | USRSTR.ICR0.BIT.BIT1;
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  a = USRSTR.ICR0.BIT.BIT5 | USRSTR.ICR0.BIT.BIT7;
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  a = USRSTR.ICR0.BIT.BIT2 | USRSTR.ICR0.BIT.BIT6;
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  PORT.BIT.IOR13 = PORT.BIT.IOR0  |  USRSTR.ICR0.BIT.BIT7;
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  PORT.BIT.IOR15 = PORT.BIT.IOR6  |  USRSTR.ICR0.BIT.BIT2;
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  PORT.BIT.IOR3  = PORT.BIT.IOR2  |  USRSTR.ICR0.BIT.BIT5;
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  PORT.BIT.IOR1  = PORT.BIT.IOR13 |  USRSTR.ICR0.BIT.BIT1;
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  PORT.BIT.IOR1  = PORT.BIT.IOR2  |  USRSTR.ICR0.BIT.BIT1;
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  PORT.BIT.IOR11 = PORT.BIT.IOR9  |  USRSTR.ICR0.BIT.BIT2;
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  PORT.BIT.IOR8  = PORT.BIT.IOR14 |  USRSTR.ICR0.BIT.BIT5;
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  PORT.BIT.IOR10 |= USRSTR.ICR0.BIT.BIT1;
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  PORT.BIT.IOR1  |= USRSTR.ICR0.BIT.BIT2;
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  PORT.BIT.IOR5  |= USRSTR.ICR0.BIT.BIT5;
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  PORT.BIT.IOR14 |= USRSTR.ICR0.BIT.BIT4;
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  /* Instruction generated on using size optimization option "-Os".  */
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  a = a & USRSTR.ICR0.BIT.BIT1;
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  a = a & USRSTR.ICR0.BIT.BIT4;
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  a = a & USRSTR.ICR0.BIT.BIT0;
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  return 0;
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}

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