URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [sh/] [sh2a-resbank.c] - Blame information for rev 826

Details | Compare with Previous | View Log


/* Test for resbank attribute.  */
/* { dg-do assemble {target sh*-*-*}} */
/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single -m2a-single-only" } */
/* { dg-final { scan-assembler "resbank" } } */
 
extern void bar(void);
 
void foo(void) __attribute__((interrupt_handler, resbank));
void foo(void)
{
  bar();
}

Line No.	Rev	Author	Line
1	325	jeremybenn	`/* Test for resbank attribute. */`
2			`/* { dg-do assemble {target sh--}} /`
3			`/* { dg-skip-if "" { "sh--" } "" "-m2a -m2a-nofpu -m2a-single -m2a-single-only" } */`
4			`/* { dg-final { scan-assembler "resbank" } } */`
5
6			`extern void bar(void);`
7
8			`void foo(void) __attribute__((interrupt_handler, resbank));`
9			`void foo(void)`
10			`{`
11			`bar();`
12			`}`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [sh/] [sh2a-resbank.c] - Blame information for rev 826