OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [sparc/] [sparc-ret.c] - Blame information for rev 816

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 326 jeremybenn 
/* { dg-do compile } */
2 
/* { dg-require-effective-target ilp32 } */
3 
/* { dg-options "-mcpu=ultrasparc -O" } */
4 
 
5 
/* Make sure that Ultrasparc return insn do not read below the stack.  */
6 
 
7 
int bar (int a, int b, int c, int d, int e, int f, int g, int h)
8 
{
9 
  int res;
10 
 
11 
  toto (&res);
12 
  return h;
13 
}
14 
/* { dg-final { global compiler_flags; if ![string match "*-m64 *" $compiler_flags] { scan-assembler "return\[ \t\]*%i7\\+8\n\[^\n\]*ld\[ \t\]*\\\[%sp\\+96\\\]" } } } */
15 
 
16 
int bar2 ()
17 
{
18 
  int res;
19 
 
20 
  toto (&res);
21 
  return res;
22 
}
23 
/* { dg-final { global compiler_flags; if ![string match "*-m64 *" $compiler_flags] { scan-assembler "return\[ \t\]*%i7\\+8\n\[^\n\]*nop" } } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.