OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [gdb/] [regformats/] [arm-with-iwmmxt.dat] - Blame information for rev 841

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
# DO NOT EDIT: generated from arm-with-iwmmxt.xml
2
name:arm_with_iwmmxt
3
xmltarget:arm-with-iwmmxt.xml
4
expedite:r11,sp,pc
5
32:r0
6
32:r1
7
32:r2
8
32:r3
9
32:r4
10
32:r5
11
32:r6
12
32:r7
13
32:r8
14
32:r9
15
32:r10
16
32:r11
17
32:r12
18
32:sp
19
32:lr
20
32:pc
21
0:
22
0:
23
0:
24
0:
25
0:
26
0:
27
0:
28
0:
29
0:
30
32:cpsr
31
64:wR0
32
64:wR1
33
64:wR2
34
64:wR3
35
64:wR4
36
64:wR5
37
64:wR6
38
64:wR7
39
64:wR8
40
64:wR9
41
64:wR10
42
64:wR11
43
64:wR12
44
64:wR13
45
64:wR14
46
64:wR15
47
32:wCSSF
48
32:wCASF
49
32:wCGR0
50
32:wCGR1
51
32:wCGR2
52
32:wCGR3

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.