OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [gdb/] [regformats/] [rs6000/] [powerpc-e500l.dat] - Blame information for rev 330

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
# DO NOT EDIT: generated from rs6000/powerpc-e500l.xml
2
name:powerpc_e500l
3
xmltarget:powerpc-e500l.xml
4
expedite:r1,pc
5
32:r0
6
32:r1
7
32:r2
8
32:r3
9
32:r4
10
32:r5
11
32:r6
12
32:r7
13
32:r8
14
32:r9
15
32:r10
16
32:r11
17
32:r12
18
32:r13
19
32:r14
20
32:r15
21
32:r16
22
32:r17
23
32:r18
24
32:r19
25
32:r20
26
32:r21
27
32:r22
28
32:r23
29
32:r24
30
32:r25
31
32:r26
32
32:r27
33
32:r28
34
32:r29
35
32:r30
36
32:r31
37
32:ev0h
38
32:ev1h
39
32:ev2h
40
32:ev3h
41
32:ev4h
42
32:ev5h
43
32:ev6h
44
32:ev7h
45
32:ev8h
46
32:ev9h
47
32:ev10h
48
32:ev11h
49
32:ev12h
50
32:ev13h
51
32:ev14h
52
32:ev15h
53
32:ev16h
54
32:ev17h
55
32:ev18h
56
32:ev19h
57
32:ev20h
58
32:ev21h
59
32:ev22h
60
32:ev23h
61
32:ev24h
62
32:ev25h
63
32:ev26h
64
32:ev27h
65
32:ev28h
66
32:ev29h
67
32:ev30h
68
32:ev31h
69
32:pc
70
32:msr
71
32:cr
72
32:lr
73
32:ctr
74
32:xer
75
0:
76
32:orig_r3
77
32:trap
78
64:acc
79
32:spefscr

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.