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jeremybenn |
/* SPU target-dependent code for GDB, the GNU debugger.
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Copyright (C) 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef SPU_TDEP_H
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#define SPU_TDEP_H
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/* Number of registers. */
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#define SPU_NUM_REGS 130
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#define SPU_NUM_PSEUDO_REGS 6
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#define SPU_NUM_GPRS 128
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/* Register numbers of various important registers. */
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enum spu_regnum
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{
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/* SPU calling convention. */
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SPU_LR_REGNUM = 0, /* Link register. */
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SPU_RAW_SP_REGNUM = 1, /* Stack pointer (full register). */
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SPU_ARG1_REGNUM = 3, /* First argument register. */
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SPU_ARGN_REGNUM = 74, /* Last argument register. */
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SPU_SAVED1_REGNUM = 80, /* First call-saved register. */
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SPU_SAVEDN_REGNUM = 127, /* Last call-saved register. */
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SPU_FP_REGNUM = 127, /* Frame pointer. */
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/* Special registers. */
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SPU_ID_REGNUM = 128, /* SPU ID register. */
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SPU_PC_REGNUM = 129, /* Next program counter. */
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SPU_SP_REGNUM = 130, /* Stack pointer (preferred slot). */
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SPU_FPSCR_REGNUM = 131, /* Floating point status/control register. */
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SPU_SRR0_REGNUM = 132, /* SRR0 register. */
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SPU_LSLR_REGNUM = 133, /* Local store limit register. */
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SPU_DECR_REGNUM = 134, /* Decrementer value. */
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SPU_DECR_STATUS_REGNUM = 135 /* Decrementer status. */
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};
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/* Address conversions.
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In a combined PPU/SPU debugging session, we have to consider multiple
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address spaces: the PPU 32- or 64-bit address space, and the 32-bit
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local store address space for each SPU context. As it is currently
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not yet possible to use the program_space / address_space mechanism
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to represent this, we encode all those addresses into one single
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64-bit address for the whole process. For SPU programs using overlays,
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this address space must also include separate ranges reserved for the
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LMA of overlay sections.
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The following combinations are supported for combined debugging:
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PPU address (this relies on the fact that PPC 64-bit user space
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addresses can never have the highest-most bit set):
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+-+---------------------------------+
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|0| ADDR [63] |
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+-+---------------------------------+
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SPU address for SPU context with id SPU (this assumes that SPU
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IDs, which are file descriptors, are never larger than 2^30):
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+-+-+--------------+----------------+
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|1|0| SPU [30] | ADDR [32] |
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+-+-+--------------+----------------+
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SPU overlay section LMA for SPU context with id SPU:
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+-+-+--------------+----------------+
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|1|1| SPU [30] | ADDR [32] |
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+-+-+--------------+----------------+
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In SPU stand-alone debugging mode (using spu-linux-nat.c),
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the following combinations are supported:
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SPU address:
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+-+-+--------------+----------------+
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|0|0| 0 | ADDR [32] |
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+-+-+--------------+----------------+
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SPU overlay section LMA:
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+-+-+--------------+----------------+
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|0|1| 0 | ADDR [32] |
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+-+-+--------------+----------------+
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The following macros allow manipulation of addresses in the
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above formats. */
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#define SPUADDR(spu, addr) \
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((spu) != -1? (ULONGEST)1 << 63 | (ULONGEST)(spu) << 32 | (addr) : (addr))
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#define SPUADDR_SPU(addr) \
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(((addr) & (ULONGEST)1 << 63) \
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? (int) ((ULONGEST)(addr) >> 32 & 0x3fffffff) \
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: -1)
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#define SPUADDR_ADDR(addr) \
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(((addr) & (ULONGEST)1 << 63)? (ULONGEST)(addr) & 0xffffffff : (addr))
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#define SPU_OVERLAY_LMA ((ULONGEST)1 << 62)
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#endif
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