OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [opcodes/] [pdp11-opc.c] - Blame information for rev 866

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn 
/* Opcode table for PDP-11.
2 
   Copyright 2001, 2002, 2005, 2006, 2007 Free Software Foundation, Inc.
3 
 
4 
   This file is part of the GNU opcodes library.
5 
 
6 
   This library is free software; you can redistribute it and/or modify
7 
   it under the terms of the GNU General Public License as published by
8 
   the Free Software Foundation; either version 3, or (at your option)
9 
   any later version.
10 
 
11 
   It is distributed in the hope that it will be useful, but WITHOUT
12 
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14 
   License for more details.
15 
 
16 
   You should have received a copy of the GNU General Public License
17 
   along with this file; see the file COPYING.  If not, write to the
18 
   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 
   MA 02110-1301, USA.  */
20 
 
21 
#include "opcode/pdp11.h"
22 
 
23 
const struct pdp11_opcode pdp11_opcodes[] =
24 
{
25 
  /* name,      pattern, mask,  opcode type,            insn type,    alias */
26 
  { "halt",     0x0000, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
27 
  { "wait",     0x0001, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
28 
  { "rti",      0x0002, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
29 
  { "bpt",      0x0003, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
30 
  { "iot",      0x0004, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
31 
  { "reset",    0x0005, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
32 
  { "rtt",      0x0006, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_LEIS },
33 
  { "mfpt",     0x0007, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_MFPT },
34 
  { "jmp",      0x0040, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
35 
  { "rts",      0x0080, 0xfff8, PDP11_OPCODE_REG,       PDP11_BASIC },
36 
  { "",         0x0088, 0xfff8, PDP11_OPCODE_ILLEGAL,   PDP11_NONE },
37 
  { "",         0x0090, 0xfff8, PDP11_OPCODE_ILLEGAL,   PDP11_NONE },
38 
  { "spl",      0x0098, 0xfff8, PDP11_OPCODE_IMM3,      PDP11_SPL },
39 
  { "nop",      0x00a0, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
40 
  { "clc",      0x00a1, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
41 
  { "clv",      0x00a2, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
42 
  { "cl_3",     0x00a3, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
43 
  { "clz",      0x00a4, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
44 
  { "cl_5",     0x00a5, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
45 
  { "cl_6",     0x00a6, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
46 
  { "cl_7",     0x00a7, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
47 
  { "cln",      0x00a8, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
48 
  { "cl_9",     0x00a9, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
49 
  { "cl_a",     0x00aa, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
50 
  { "cl_b",     0x00ab, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
51 
  { "cl_c",     0x00ac, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
52 
  { "cl_d",     0x00ad, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
53 
  { "cl_e",     0x00ae, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
54 
  { "ccc",      0x00af, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
55 
  { "se_0",     0x00b0, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
56 
  { "sec",      0x00b1, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
57 
  { "sev",      0x00b2, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
58 
  { "se_3",     0x00b3, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
59 
  { "sez",      0x00b4, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
60 
  { "se_5",     0x00b5, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
61 
  { "se_6",     0x00b6, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
62 
  { "se_7",     0x00b7, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
63 
  { "sen",      0x00b8, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
64 
  { "se_9",     0x00b9, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
65 
  { "se_a",     0x00ba, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
66 
  { "se_b",     0x00bb, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
67 
  { "se_c",     0x00bc, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
68 
  { "se_d",     0x00bd, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
69 
  { "se_e",     0x00be, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
70 
  { "scc",      0x00bf, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_BASIC },
71 
  { "swab",     0x00c0, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
72 
  { "br",       0x0100, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
73 
  { "bne",      0x0200, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
74 
  { "beq",      0x0300, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
75 
  { "bge",      0x0400, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
76 
  { "blt",      0x0500, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
77 
  { "bgt",      0x0600, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
78 
  { "ble",      0x0700, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
79 
  { "jsr",      0x0800, 0xfe00, PDP11_OPCODE_REG_OP,    PDP11_BASIC },
80 
  { "clr",      0x0a00, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
81 
  { "com",      0x0a40, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
82 
  { "inc",      0x0a80, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
83 
  { "dec",      0x0ac0, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
84 
  { "neg",      0x0b00, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
85 
  { "adc",      0x0b40, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
86 
  { "sbc",      0x0b80, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
87 
  { "tst",      0x0bc0, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
88 
  { "ror",      0x0c00, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
89 
  { "rol",      0x0c40, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
90 
  { "asr",      0x0c80, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
91 
  { "asl",      0x0cc0, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
92 
  { "mark",     0x0d00, 0xffc0, PDP11_OPCODE_IMM6,      PDP11_LEIS },
93 
  { "mfpi",     0x0d40, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
94 
  { "mtpi",     0x0d80, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
95 
  { "sxt",      0x0dc0, 0xffc0, PDP11_OPCODE_OP,        PDP11_LEIS },
96 
  { "csm",      0x0e00, 0xffc0, PDP11_OPCODE_OP,        PDP11_CSM },
97 
  { "tstset",   0x0e40, 0xffc0, PDP11_OPCODE_OP,        PDP11_MPROC },
98 
  { "wrtlck",   0x0e80, 0xffc0, PDP11_OPCODE_OP,        PDP11_MPROC },
99 
/*{ "",         0x0ec0, 0xffe0, PDP11_OPCODE_ILLEGAL,   PDP11_NONE },*/
100 
  { "mov",      0x1000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
101 
  { "cmp",      0x2000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
102 
  { "bit",      0x3000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
103 
  { "bic",      0x4000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
104 
  { "bis",      0x5000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
105 
  { "add",      0x6000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
106 
  { "mul",      0x7000, 0xfe00, PDP11_OPCODE_REG_OP_REV,PDP11_EIS },
107 
  { "div",      0x7200, 0xfe00, PDP11_OPCODE_REG_OP_REV,PDP11_EIS },
108 
  { "ash",      0x7400, 0xfe00, PDP11_OPCODE_REG_OP_REV,PDP11_EIS },
109 
  { "ashc",     0x7600, 0xfe00, PDP11_OPCODE_REG_OP_REV,PDP11_EIS },
110 
  { "xor",      0x7800, 0xfe00, PDP11_OPCODE_REG_OP,    PDP11_LEIS },
111 
  { "fadd",     0x7a00, 0xfff8, PDP11_OPCODE_REG,       PDP11_FIS },
112 
  { "fsub",     0x7a08, 0xfff8, PDP11_OPCODE_REG,       PDP11_FIS },
113 
  { "fmul",     0x7a10, 0xfff8, PDP11_OPCODE_REG,       PDP11_FIS },
114 
  { "fdiv",     0x7a18, 0xfff8, PDP11_OPCODE_REG,       PDP11_FIS },
115 
/*{ "",         0x7a20, 0xffe0, PDP11_OPCODE_ILLEGAL,   PDP11_NONE },*/
116 
/*{ "",         0x7a40, 0xffc0, PDP11_OPCODE_ILLEGAL,   PDP11_NONE },*/
117 
/*{ "",         0x7a80, 0xff80, PDP11_OPCODE_ILLEGAL,   PDP11_NONE },*/
118 
/*{ "",         0x7b00, 0xffe0, PDP11_OPCODE_ILLEGAL,   PDP11_NONE },*/
119 
  { "l2dr",     0x7c10, 0xfff8, PDP11_OPCODE_REG,       PDP11_CIS },/*l2d*/
120 
  { "movc",     0x7c18, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
121 
  { "movrc",    0x7c19, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
122 
  { "movtc",    0x7c1a, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
123 
  { "locc",     0x7c20, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
124 
  { "skpc",     0x7c21, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
125 
  { "scanc",    0x7c22, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
126 
  { "spanc",    0x7c23, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
127 
  { "cmpc",     0x7c24, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
128 
  { "matc",     0x7c25, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
129 
  { "addn",     0x7c28, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
130 
  { "subn",     0x7c29, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
131 
  { "cmpn",     0x7c2a, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
132 
  { "cvtnl",    0x7c2b, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
133 
  { "cvtpn",    0x7c2c, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
134 
  { "cvtnp",    0x7c2d, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
135 
  { "ashn",     0x7c2e, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
136 
  { "cvtln",    0x7c2f, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
137 
  { "l3dr",     0x7c30, 0xfff8, PDP11_OPCODE_REG,       PDP11_CIS },/*l3d*/
138 
  { "addp",     0x7c38, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
139 
  { "subp",     0x7c39, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
140 
  { "cmpp",     0x7c3a, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
141 
  { "cvtpl",    0x7c3b, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
142 
  { "mulp",     0x7c3c, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
143 
  { "divp",     0x7c3d, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
144 
  { "ashp",     0x7c3e, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
145 
  { "cvtlp",    0x7c3f, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
146 
  { "movci",    0x7c58, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
147 
  { "movrci",   0x7c59, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
148 
  { "movtci",   0x7c5a, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
149 
  { "locci",    0x7c60, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
150 
  { "skpci",    0x7c61, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
151 
  { "scanci",   0x7c62, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
152 
  { "spanci",   0x7c63, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
153 
  { "cmpci",    0x7c64, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
154 
  { "matci",    0x7c65, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
155 
  { "addni",    0x7c68, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
156 
  { "subni",    0x7c69, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
157 
  { "cmpni",    0x7c6a, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
158 
  { "cvtnli",   0x7c6b, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
159 
  { "cvtpni",   0x7c6c, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
160 
  { "cvtnpi",   0x7c6d, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
161 
  { "ashni",    0x7c6e, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
162 
  { "cvtlni",   0x7c6f, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
163 
  { "addpi",    0x7c78, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
164 
  { "subpi",    0x7c79, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
165 
  { "cmppi",    0x7c7a, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
166 
  { "cvtpli",   0x7c7b, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
167 
  { "mulpi",    0x7c7c, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
168 
  { "divpi",    0x7c7d, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
169 
  { "ashpi",    0x7c7e, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
170 
  { "cvtlpi",   0x7c7f, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_CIS },
171 
  { "med",      0x7d80, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_UCODE },
172 
  { "xfc",      0x7dc0, 0xffc0, PDP11_OPCODE_IMM6,      PDP11_UCODE },
173 
  { "sob",      0x7e00, 0xfe00, PDP11_OPCODE_REG_DISPL, PDP11_LEIS },
174 
  { "bpl",      0x8000, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
175 
  { "bmi",      0x8100, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
176 
  { "bhi",      0x8200, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
177 
  { "blos",     0x8300, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
178 
  { "bvc",      0x8400, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
179 
  { "bvs",      0x8500, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
180 
  { "bcc",      0x8600, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },/*bhis*/
181 
  { "bcs",      0x8700, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },/*blo*/
182 
  { "emt",      0x8800, 0xff00, PDP11_OPCODE_IMM8,      PDP11_BASIC },
183 
  { "sys",      0x8900, 0xff00, PDP11_OPCODE_IMM8,      PDP11_BASIC },/*trap*/
184 
  { "clrb",     0x8a00, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
185 
  { "comb",     0x8a40, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
186 
  { "incb",     0x8a80, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
187 
  { "decb",     0x8ac0, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
188 
  { "negb",     0x8b00, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
189 
  { "adcb",     0x8b40, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
190 
  { "sbcb",     0x8b80, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
191 
  { "tstb",     0x8bc0, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
192 
  { "rorb",     0x8c00, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
193 
  { "rolb",     0x8c40, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
194 
  { "asrb",     0x8c80, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
195 
  { "aslb",     0x8cc0, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
196 
  { "mtps",     0x8d00, 0xffc0, PDP11_OPCODE_OP,        PDP11_MXPS },
197 
  { "mfpd",     0x8d40, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
198 
  { "mtpd",     0x8d80, 0xffc0, PDP11_OPCODE_OP,        PDP11_BASIC },
199 
  { "mfps",     0x8dc0, 0xffc0, PDP11_OPCODE_OP,        PDP11_MXPS },
200 
  { "movb",     0x9000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
201 
  { "cmpb",     0xa000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
202 
  { "bitb",     0xb000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
203 
  { "bicb",     0xc000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
204 
  { "bisb",     0xd000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
205 
  { "sub",      0xe000, 0xf000, PDP11_OPCODE_OP_OP,     PDP11_BASIC },
206 
  { "cfcc",     0xf000, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_FPP },
207 
  { "setf",     0xf001, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_FPP },
208 
  { "seti",     0xf002, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_FPP },
209 
  { "ldub",     0xf003, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_UCODE },
210 
  /* fpp trap   0xf004..0xf008 */
211 
  { "setd",     0xf009, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_FPP },
212 
  { "setl",     0xf00a, 0xffff, PDP11_OPCODE_NO_OPS,    PDP11_FPP },
213 
  /* fpp trap   0xf00b..0xf03f */
214 
  { "ldfps",    0xf040, 0xffc0, PDP11_OPCODE_OP,        PDP11_FPP },
215 
  { "stfps",    0xf080, 0xffc0, PDP11_OPCODE_OP,        PDP11_FPP },
216 
  { "stst",     0xf0c0, 0xffc0, PDP11_OPCODE_OP,        PDP11_FPP },
217 
  { "clrf",     0xf100, 0xffc0, PDP11_OPCODE_FOP,       PDP11_FPP },
218 
  { "tstf",     0xf140, 0xffc0, PDP11_OPCODE_FOP,       PDP11_FPP },
219 
  { "absf",     0xf180, 0xffc0, PDP11_OPCODE_FOP,       PDP11_FPP },
220 
  { "negf",     0xf1c0, 0xffc0, PDP11_OPCODE_FOP,       PDP11_FPP },
221 
  { "mulf",     0xf200, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
222 
  { "modf",     0xf300, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
223 
  { "addf",     0xf400, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
224 
  { "ldf",      0xf500, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },/*movif*/
225 
  { "subf",     0xf600, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
226 
  { "cmpf",     0xf700, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
227 
  { "stf",      0xf800, 0xff00, PDP11_OPCODE_AC_FOP,    PDP11_FPP },/*movfi*/
228 
  { "divf",     0xf900, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
229 
  { "stexp",    0xfa00, 0xff00, PDP11_OPCODE_AC_OP,     PDP11_FPP },
230 
  { "stcfi",    0xfb00, 0xff00, PDP11_OPCODE_AC_OP,     PDP11_FPP },
231 
  { "stcff",    0xfc00, 0xff00, PDP11_OPCODE_AC_FOP,    PDP11_FPP },/* ? */
232 
  { "ldexp",    0xfd00, 0xff00, PDP11_OPCODE_OP_AC,     PDP11_FPP },
233 
  { "ldcif",    0xfe00, 0xff00, PDP11_OPCODE_OP_AC,     PDP11_FPP },
234 
  { "ldcff",    0xff00, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },/* ? */
235 
/* This entry MUST be last; it is a "catch-all" entry that will match when no
236 
 * other opcode entry matches during disassembly.
237 
 */
238 
  { "",         0x0000, 0x0000, PDP11_OPCODE_ILLEGAL,   PDP11_NONE },
239 
};
240 
 
241 
const struct pdp11_opcode pdp11_aliases[] =
242 
{
243 
  /* name,      pattern, mask,  opcode type,            insn type */
244 
  { "l2d",      0x7c10, 0xfff8, PDP11_OPCODE_REG,       PDP11_CIS },
245 
  { "l3d",      0x7c30, 0xfff8, PDP11_OPCODE_REG,       PDP11_CIS },
246 
  { "bhis",     0x8600, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
247 
  { "blo",      0x8700, 0xff00, PDP11_OPCODE_DISPL,     PDP11_BASIC },
248 
  { "trap",     0x8900, 0xff00, PDP11_OPCODE_IMM8,      PDP11_BASIC },
249 
  /* fpp xxxd alternate names to xxxf opcodes */
250 
  { "clrd",     0xf100, 0xffc0, PDP11_OPCODE_FOP,       PDP11_FPP },
251 
  { "tstd",     0xf140, 0xffc0, PDP11_OPCODE_FOP,       PDP11_FPP },
252 
  { "absd",     0xf180, 0xffc0, PDP11_OPCODE_FOP,       PDP11_FPP },
253 
  { "negd",     0xf1c0, 0xffc0, PDP11_OPCODE_FOP,       PDP11_FPP },
254 
  { "muld",     0xf200, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
255 
  { "modd",     0xf300, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
256 
  { "addd",     0xf400, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
257 
  { "ldd",      0xf500, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },/*movif*/
258 
  { "subd",     0xf600, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
259 
  { "cmpd",     0xf700, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
260 
  { "std",      0xf800, 0xff00, PDP11_OPCODE_AC_FOP,    PDP11_FPP },/*movfi*/
261 
  { "divd",     0xf900, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },
262 
  { "stcfl",    0xfb00, 0xff00, PDP11_OPCODE_AC_OP,     PDP11_FPP },
263 
  { "stcdi",    0xfb00, 0xff00, PDP11_OPCODE_AC_OP,     PDP11_FPP },
264 
  { "stcdl",    0xfb00, 0xff00, PDP11_OPCODE_AC_OP,     PDP11_FPP },
265 
  { "stcfd",    0xfc00, 0xff00, PDP11_OPCODE_AC_FOP,    PDP11_FPP },/* ? */
266 
  { "stcdf",    0xfc00, 0xff00, PDP11_OPCODE_AC_FOP,    PDP11_FPP },/* ? */
267 
  { "ldcid",    0xfe00, 0xff00, PDP11_OPCODE_OP_AC,     PDP11_FPP },
268 
  { "ldclf",    0xfe00, 0xff00, PDP11_OPCODE_OP_AC,     PDP11_FPP },
269 
  { "ldcld",    0xfe00, 0xff00, PDP11_OPCODE_OP_AC,     PDP11_FPP },
270 
  { "ldcfd",    0xff00, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },/* ? */
271 
  { "ldcdf",    0xff00, 0xff00, PDP11_OPCODE_FOP_AC,    PDP11_FPP },/* ? */
272 
};
273 
 
274 
const int pdp11_num_opcodes = sizeof pdp11_opcodes / sizeof pdp11_opcodes[0];
275 
const int pdp11_num_aliases = sizeof pdp11_aliases / sizeof pdp11_aliases[0];

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.