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[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [mips/] [ChangeLog] - Blame information for rev 853

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Line No. Rev Author Line
1 330 jeremybenn
2010-04-14  Mike Frysinger  
2
 
3
        * interp.c (sim_write): Add const to buffer arg.
4
 
5
2010-01-18  Masaki Muranaka    (tiny change)
6
 
7
        * interp.c: Don't include sysdep.h
8
 
9
2010-01-09  Ralf Wildenhues  
10
 
11
        * configure: Regenerate.
12
 
13
2009-08-22  Ralf Wildenhues  
14
 
15
        * config.in: Regenerate.
16
        * configure: Likewise.
17
 
18
        * configure: Regenerate.
19
 
20
2008-07-11  Hans-Peter Nilsson  
21
 
22
        * configure: Regenerate to track ../common/common.m4 changes.
23
        * config.in: Ditto.
24
 
25
2008-06-06  Vladimir Prus  
26
            Daniel Jacobowitz  
27
            Joseph Myers  
28
 
29
        * configure: Regenerate.
30
 
31
2007-10-22  Richard Sandiford  
32
 
33
        * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
34
        that unconditionally allows fmt_ps.
35
        (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
36
        (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
37
        (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
38
        filter from 64,f to 32,f.
39
        (PREFX): Change filter from 64 to 32.
40
        (LDXC1, LUXC1): Provide separate mips32r2 implementations
41
        that use do_load_double instead of do_load.  Make both LUXC1
42
        versions unpredictable if SizeFGR () != 64.
43
        (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
44
        instead of do_store.  Remove unused variable.  Make both SUXC1
45
        versions unpredictable if SizeFGR () != 64.
46
 
47
2007-10-07  Richard Sandiford  
48
 
49
        * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
50
        (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
51
        shifts for that case.
52
 
53
2007-09-04  Nick Clifton  
54
 
55
        * interp.c (options enum): Add OPTION_INFO_MEMORY.
56
        (display_mem_info): New static variable.
57
        (mips_option_handler): Handle OPTION_INFO_MEMORY.
58
        (mips_options): Add info-memory and memory-info.
59
        (sim_open): After processing the command line and board
60
        specification, check display_mem_info.  If it is set then
61
        call the real handler for the --memory-info command line
62
        switch.
63
 
64
2007-08-24  Joel Brobecker  
65
 
66
        * configure.ac: Change license of multi-run.c to GPL version 3.
67
        * configure: Regenerate.
68
 
69
2007-06-28  Richard Sandiford  
70
 
71
        * configure.ac, configure: Revert last patch.
72
 
73
2007-06-26  Richard Sandiford  
74
 
75
        * configure.ac (sim_mipsisa3264_configs): New variable.
76
        (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
77
        every configuration support all four targets, using the triplet to
78
        determine the default.
79
        * configure: Regenerate.
80
 
81
2007-06-25  Richard Sandiford  
82
 
83
        * Makefile.in (m16run.o): New rule.
84
 
85
2007-05-15  Thiemo Seufer  
86
 
87
        * mips3264r2.igen (DSHD): Fix compile warning.
88
 
89
2007-05-14  Thiemo Seufer  
90
 
91
        * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
92
        CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
93
        NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
94
        RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
95
        for mips32r2.
96
 
97
2007-03-01  Thiemo Seufer  
98
 
99
        * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
100
        and mips64.
101
 
102
2007-02-20  Thiemo Seufer  
103
 
104
        * dsp.igen: Update copyright notice.
105
        * dsp2.igen: Fix copyright notice.
106
 
107
2007-02-20  Thiemo Seufer  
108
            Chao-Ying Fu  
109
 
110
        * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
111
        * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
112
        Add dsp2 to sim_igen_machine.
113
        * configure: Regenerate.
114
        * dsp.igen (do_ph_op): Add MUL support when op = 2.
115
        (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
116
        (mulq_rs.ph): Use do_ph_mulq.
117
        (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
118
        * mips.igen: Add dsp2 model and include dsp2.igen.
119
        (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
120
        for *mips32r2, *mips64r2, *dsp.
121
        (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
122
        for *mips32r2, *mips64r2, *dsp2.
123
        * dsp2.igen: New file for MIPS DSP REV 2 ASE.
124
 
125
2007-02-19  Thiemo Seufer  
126
            Nigel Stephens  
127
 
128
        * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
129
        jumps with hazard barrier.
130
 
131
2007-02-19  Thiemo Seufer  
132
            Nigel Stephens  
133
 
134
        * interp.c (sim_monitor): Flush stdout and stderr file descriptors
135
        after each call to sim_io_write.
136
 
137
2007-02-19  Thiemo Seufer  
138
            Nigel Stephens  
139
 
140
        * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
141
        supported by this simulator.
142
        (decode_coproc): Recognise additional CP0 Config registers
143
        correctly.
144
 
145
2007-02-19  Thiemo Seufer  
146
            Nigel Stephens  
147
            David Ung  
148
 
149
        * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
150
        uninterpreted formats. If fmt is one of the uninterpreted types
151
        don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
152
        fmt_word, and fmt_uninterpreted_64 like fmt_long.
153
        (store_fpr): When writing an invalid odd register, set the
154
        matching even register to fmt_unknown, not the following register.
155
        * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
156
        the the memory window at offset 0 set by --memory-size command
157
        line option.
158
        (sim_store_register): Handle storing 4 bytes to an 8 byte floating
159
        point register.
160
        (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
161
        register.
162
        (sim_monitor): When returning the memory size to the MIPS
163
        application, use the value in STATE_MEM_SIZE, not an arbitrary
164
        hardcoded value.
165
        (cop_lw): Don' mess around with FPR_STATE, just pass
166
        fmt_uninterpreted_32 to StoreFPR.
167
        (cop_sw): Similarly.
168
        (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
169
        (cop_sd): Similarly.
170
        * mips.igen (not_word_value): Single version for mips32, mips64
171
        and mips16.
172
 
173
2007-02-19  Thiemo Seufer 
174
            Nigel Stephens  
175
 
176
        * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
177
        MBytes.
178
 
179
2007-02-17  Thiemo Seufer  
180
 
181
        * configure.ac (mips*-sde-elf*): Move in front of generic machine
182
        configuration.
183
        * configure: Regenerate.
184
 
185
2007-02-17  Thiemo Seufer  
186
 
187
        * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
188
        Add mdmx to sim_igen_machine.
189
        (mipsisa64*-*-*): Likewise. Remove dsp.
190
        (mipsisa32*-*-*): Remove dsp.
191
        * configure: Regenerate.
192
 
193
2007-02-13  Thiemo Seufer  
194
 
195
        * configure.ac: Add mips*-sde-elf* target.
196
        * configure: Regenerate.
197
 
198
2006-12-21  Hans-Peter Nilsson  
199
 
200
        * acconfig.h: Remove.
201
        * config.in, configure: Regenerate.
202
 
203
2006-11-07  Thiemo Seufer  
204
 
205
        * dsp.igen (do_w_op): Fix compiler warning.
206
 
207
2006-08-29  Thiemo Seufer  
208
            David Ung  
209
 
210
        * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
211
        sim_igen_machine.
212
        * configure: Regenerate.
213
        * mips.igen (model): Add smartmips.
214
        (MADDU): Increment ACX if carry.
215
        (do_mult): Clear ACX.
216
        (ROR,RORV): Add smartmips.
217
        (include): Include smartmips.igen.
218
        * sim-main.h (ACX): Set to REGISTERS[89].
219
        * smartmips.igen: New file.
220
 
221
2006-08-29  Thiemo Seufer  
222
            David Ung  
223
 
224
        * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
225
        mips3264r2.igen. Add missing dependency rules.
226
        * m16e.igen: Support for mips16e save/restore instructions.
227
 
228
2006-06-13  Richard Earnshaw  
229
 
230
        * configure: Regenerated.
231
 
232
2006-06-05  Daniel Jacobowitz  
233
 
234
        * configure: Regenerated.
235
 
236
2006-05-31  Daniel Jacobowitz  
237
 
238
        * configure: Regenerated.
239
 
240
2006-05-15 Chao-ying Fu  
241
 
242
        * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
243
 
244
2006-04-18  Nick Clifton  
245
 
246
        * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
247
        statement.
248
 
249
2006-03-29  Hans-Peter Nilsson  
250
 
251
        * configure: Regenerate.
252
 
253
2005-12-14  Chao-ying Fu  
254
 
255
        * Makefile.in (SIM_OBJS): Add dsp.o.
256
        (dsp.o): New dependency.
257
        (IGEN_INCLUDE): Add dsp.igen.
258
        * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
259
        mipsisa64*-*-*): Add dsp to sim_igen_machine.
260
        * configure: Regenerate.
261
        * mips.igen: Add dsp model and include dsp.igen.
262
        (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
263
        because these instructions are extended in DSP ASE.
264
        * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
265
        adding 6 DSP accumulator registers and 1 DSP control register.
266
        (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
267
        AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
268
        DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
269
        DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
270
        DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
271
        DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
272
        DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
273
        DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
274
        DSPCR_CCOND_SMASK): New define.
275
        (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
276
        * dsp.c, dsp.igen: New files for MIPS DSP ASE.
277
 
278
2005-07-08  Ian Lance Taylor  
279
 
280
        * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
281
 
282
2005-06-16  David Ung  
283
            Nigel Stephens  
284
 
285
        * mips.igen: New mips16e model and include m16e.igen.
286
        (check_u64): Add mips16e tag.
287
        * m16e.igen: New file for MIPS16e instructions.
288
        * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
289
        mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
290
        models.
291
        * configure: Regenerate.
292
 
293
2005-05-26  David Ung  
294
 
295
        * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
296
        tags to all instructions which are applicable to the new ISAs.
297
        (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
298
        vr.igen.
299
        * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
300
        instructions.
301
        * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
302
        to mips.igen.
303
        * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
304
        * configure: Regenerate.
305
 
306
2005-03-23  Mark Kettenis  
307
 
308
        * configure: Regenerate.
309
 
310
2005-01-14  Andrew Cagney  
311
 
312
        * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
313
        explicit call to AC_CONFIG_HEADER.
314
        * configure: Regenerate.
315
 
316
2005-01-12  Andrew Cagney  
317
 
318
        * configure.ac: Update to use ../common/common.m4.
319
        * configure: Re-generate.
320
 
321
2005-01-11  Andrew Cagney  
322
 
323
        * configure: Regenerated to track ../common/aclocal.m4 changes.
324
 
325
2005-01-07  Andrew Cagney  
326
 
327
        * configure.ac: Rename configure.in, require autoconf 2.59.
328
        * configure: Re-generate.
329
 
330
2004-12-08  Hans-Peter Nilsson  
331
 
332
        * configure: Regenerate for ../common/aclocal.m4 update.
333
 
334
2004-09-24  Monika Chaddha  
335
 
336
        Committed by Andrew Cagney.
337
        * m16.igen (CMP, CMPI): Fix assembler.
338
 
339
2004-08-18  Chris Demetriou  
340
 
341
        * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
342
        * configure: Regenerate.
343
 
344
2004-06-25  Chris Demetriou  
345
 
346
        * configure.in (sim_m16_machine): Include mipsIII.
347
        * configure: Regenerate.
348
 
349
2004-05-11  Maciej W. Rozycki  
350
 
351
        * mips/interp.c (decode_coproc): Sign-extend the address retrieved
352
        from COP0_BADVADDR.
353
        * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
354
 
355
2004-04-10  Chris Demetriou  
356
 
357
        * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
358
 
359
2004-04-09  Chris Demetriou  
360
 
361
        * mips.igen (check_fmt): Remove.
362
        (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
363
        (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
364
        (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
365
        (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
366
        (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
367
        (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
368
        (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
369
        (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
370
        (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
371
        (C.cnd.fmta): Remove incorrect call to check_fmt_p.
372
 
373
2004-04-09  Chris Demetriou  
374
 
375
        * sb1.igen (check_sbx): New function.
376
        (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
377
 
378
2004-03-29  Chris Demetriou  
379
            Richard Sandiford  
380
 
381
        * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
382
        (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
383
        * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
384
        separate implementations for mipsIV and mipsV.  Use new macros to
385
        determine whether the restrictions apply.
386
 
387
2004-01-19  Chris Demetriou  
388
 
389
        * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
390
        (check_mult_hilo): Improve comments.
391
        (check_div_hilo): Likewise.  Also, fork off a new version
392
        to handle mips32/mips64 (since there are no hazards to check
393
        in MIPS32/MIPS64).
394
 
395
2003-06-17  Richard Sandiford  
396
 
397
        * mips.igen (do_dmultx): Fix check for negative operands.
398
 
399
2003-05-16  Ian Lance Taylor  
400
 
401
        * Makefile.in (SHELL): Make sure this is defined.
402
        (various): Use $(SHELL) whenever we invoke move-if-change.
403
 
404
2003-05-03  Chris Demetriou  
405
 
406
        * cp1.c: Tweak attribution slightly.
407
        * cp1.h: Likewise.
408
        * mdmx.c: Likewise.
409
        * mdmx.igen: Likewise.
410
        * mips3d.igen: Likewise.
411
        * sb1.igen: Likewise.
412
 
413
2003-04-15  Richard Sandiford  
414
 
415
        * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
416
        unsigned operands.
417
 
418
2003-02-27  Andrew Cagney  
419
 
420
        * interp.c (sim_open): Rename _bfd to bfd.
421
        (sim_create_inferior): Ditto.
422
 
423
2003-01-14  Chris Demetriou  
424
 
425
        * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
426
 
427
2003-01-14  Chris Demetriou  
428
 
429
        * mips.igen (EI, DI): Remove.
430
 
431
2003-01-05  Richard Sandiford  
432
 
433
        * Makefile.in (tmp-run-multi): Fix mips16 filter.
434
 
435
2003-01-04  Richard Sandiford  
436
            Andrew Cagney  
437
            Gavin Romig-Koch  
438
            Graydon Hoare  
439
            Aldy Hernandez  
440
            Dave Brolley  
441
            Chris Demetriou  
442
 
443
        * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
444
        (sim_mach_default): New variable.
445
        (mips64vr-*-*, mips64vrel-*-*): New configurations.
446
        Add a new simulator generator, MULTI.
447
        * configure: Regenerate.
448
        * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
449
        (multi-run.o): New dependency.
450
        (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
451
        (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
452
        (tmp-multi): Combine them.
453
        (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
454
        (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
455
        (distclean-extra): New rule.
456
        * sim-main.h: Include bfd.h.
457
        (MIPS_MACH): New macro.
458
        * mips.igen (vr4120, vr5400, vr5500): New models.
459
        (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
460
        * vr.igen: Replace with new version.
461
 
462
2003-01-04  Chris Demetriou  
463
 
464
        * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
465
        * configure: Regenerate.
466
 
467
2002-12-31  Chris Demetriou  
468
 
469
        * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
470
        * mips.igen: Remove all invocations of check_branch_bug and
471
        mark_branch_bug.
472
 
473
2002-12-16  Chris Demetriou  
474
 
475
        * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
476
 
477
2002-07-30  Chris Demetriou  
478
 
479
        * mips.igen (do_load_double, do_store_double): New functions.
480
        (LDC1, SDC1): Rename to...
481
        (LDC1b, SDC1b): respectively.
482
        (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
483
 
484
2002-07-29  Michael Snyder  
485
 
486
        * cp1.c (fp_recip2): Modify initialization expression so that
487
        GCC will recognize it as constant.
488
 
489
2002-06-18  Chris Demetriou  
490
 
491
        * mdmx.c (SD_): Delete.
492
        (Unpredictable): Re-define, for now, to directly invoke
493
        unpredictable_action().
494
        (mdmx_acc_op): Fix error in .ob immediate handling.
495
 
496
2002-06-18  Andrew Cagney  
497
 
498
        * interp.c (sim_firmware_command): Initialize `address'.
499
 
500
2002-06-16  Andrew Cagney  
501
 
502
        * configure: Regenerated to track ../common/aclocal.m4 changes.
503
 
504
2002-06-14  Chris Demetriou  
505
            Ed Satterthwaite  
506
 
507
        * mips3d.igen: New file which contains MIPS-3D ASE instructions.
508
        * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
509
        * mips.igen: Include mips3d.igen.
510
        (mips3d): New model name for MIPS-3D ASE instructions.
511
        (CVT.W.fmt): Don't use this instruction for word (source) format
512
        instructions.
513
        * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
514
        (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
515
        (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
516
        (NR_FRAC_GUARD, IMPLICIT_1): New macros.
517
        * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
518
        (RSquareRoot1, RSquareRoot2): New macros.
519
        (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
520
        (fp_rsqrt2): New functions.
521
        * configure.in: Add MIPS-3D support to mipsisa64 simulator.
522
        * configure: Regenerate.
523
 
524
2002-06-13  Chris Demetriou  
525
            Ed Satterthwaite  
526
 
527
        * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
528
        (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
529
        (fp_inv_sqrt, fpu_format_name): Add paired-single support.
530
        (convert): Note that this function is not used for paired-single
531
        format conversions.
532
        (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
533
        * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
534
        (check_fmt_p): Enable paired-single support.
535
        (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
536
        (PUU.PS): New instructions.
537
        (CVT.S.fmt): Don't use this instruction for paired-single format
538
        destinations.
539
        * sim-main.h (FP_formats): New value 'fmt_ps.'
540
        (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
541
        (PSLower, PSUpper, PackPS, ConvertPS): New macros.
542
 
543
2002-06-12  Chris Demetriou  
544
 
545
        * mips.igen: Fix formatting of function calls in
546
        many FP operations.
547
 
548
2002-06-12  Chris Demetriou  
549
 
550
        * mips.igen (MOVN, MOVZ): Trace result.
551
        (TNEI): Print "tnei" as the opcode name in traces.
552
        (CEIL.W): Add disassembly string for traces.
553
        (RSQRT.fmt): Make location of disassembly string consistent
554
        with other instructions.
555
 
556
2002-06-12  Chris Demetriou  
557
 
558
        * mips.igen (X): Delete unused function.
559
 
560
2002-06-08  Andrew Cagney  
561
 
562
        * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
563
 
564
2002-06-07  Chris Demetriou  
565
            Ed Satterthwaite  
566
 
567
        * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
568
        (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
569
        * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
570
        (fp_nmsub): New prototypes.
571
        (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
572
        (NegMultiplySub): New defines.
573
        * mips.igen (RSQRT.fmt): Use RSquareRoot().
574
        (MADD.D, MADD.S): Replace with...
575
        (MADD.fmt): New instruction.
576
        (MSUB.D, MSUB.S): Replace with...
577
        (MSUB.fmt): New instruction.
578
        (NMADD.D, NMADD.S): Replace with...
579
        (NMADD.fmt): New instruction.
580
        (NMSUB.D, MSUB.S): Replace with...
581
        (NMSUB.fmt): New instruction.
582
 
583
2002-06-07  Chris Demetriou  
584
            Ed Satterthwaite  
585
 
586
        * cp1.c: Fix more comment spelling and formatting.
587
        (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
588
        (denorm_mode): New function.
589
        (fpu_unary, fpu_binary): Round results after operation, collect
590
        status from rounding operations, and update the FCSR.
591
        (convert): Collect status from integer conversions and rounding
592
        operations, and update the FCSR.  Adjust NaN values that result
593
        from conversions.  Convert to use sim_io_eprintf rather than
594
        fprintf, and remove some debugging code.
595
        * cp1.h (fenr_FS): New define.
596
 
597
2002-06-07  Chris Demetriou  
598
 
599
        * cp1.c (convert): Remove unusable debugging code, and move MIPS
600
        rounding mode to sim FP rounding mode flag conversion code into...
601
        (rounding_mode): New function.
602
 
603
2002-06-07  Chris Demetriou  
604
 
605
        * cp1.c: Clean up formatting of a few comments.
606
        (value_fpr): Reformat switch statement.
607
 
608
2002-06-06  Chris Demetriou  
609
            Ed Satterthwaite  
610
 
611
        * cp1.h: New file.
612
        * sim-main.h: Include cp1.h.
613
        (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
614
        (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
615
        (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
616
        (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
617
        (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
618
        (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
619
        * cp1.c: Don't include sim-fpu.h; already included by
620
        sim-main.h.  Clean up formatting of some comments.
621
        (NaN, Equal, Less): Remove.
622
        (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
623
        (fp_cmp): New functions.
624
        * mips.igen (do_c_cond_fmt): Remove.
625
        (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
626
        Compare.  Add result tracing.
627
        (CxC1): Remove, replace with...
628
        (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
629
        (DMxC1): Remove, replace with...
630
        (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
631
        (MxC1): Remove, replace with...
632
        (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
633
 
634
2002-06-04  Chris Demetriou  
635
 
636
        * sim-main.h (FGRIDX): Remove, replace all uses with...
637
        (FGR_BASE): New macro.
638
        (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
639
        (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
640
        (NR_FGR, FGR): Likewise.
641
        * interp.c: Replace all uses of FGRIDX with FGR_BASE.
642
        * mips.igen: Likewise.
643
 
644
2002-06-04  Chris Demetriou  
645
 
646
        * cp1.c: Add an FSF Copyright notice to this file.
647
 
648
2002-06-04  Chris Demetriou  
649
            Ed Satterthwaite  
650
 
651
        * cp1.c (Infinity): Remove.
652
        * sim-main.h (Infinity): Likewise.
653
 
654
        * cp1.c (fp_unary, fp_binary): New functions.
655
        (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
656
        (fp_sqrt): New functions, implemented in terms of the above.
657
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
658
        (Recip, SquareRoot): Remove (replaced by functions above).
659
        * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
660
        (fp_recip, fp_sqrt): New prototypes.
661
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
662
        (Recip, SquareRoot): Replace prototypes with #defines which
663
        invoke the functions above.
664
 
665
2002-06-03  Chris Demetriou  
666
 
667
        * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
668
        (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
669
        file, remove PARAMS from prototypes.
670
        (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
671
        simulator state arguments.
672
        (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
673
        pass simulator state arguments.
674
        * cp1.c (SD): Redefine as CPU_STATE(cpu).
675
        (store_fpr, convert): Remove 'sd' argument.
676
        (value_fpr): Likewise.  Convert to use 'SD' instead.
677
 
678
2002-06-03  Chris Demetriou  
679
 
680
        * cp1.c (Min, Max): Remove #if 0'd functions.
681
        * sim-main.h (Min, Max): Remove.
682
 
683
2002-06-03  Chris Demetriou  
684
 
685
        * cp1.c: fix formatting of switch case and default labels.
686
        * interp.c: Likewise.
687
        * sim-main.c: Likewise.
688
 
689
2002-06-03  Chris Demetriou  
690
 
691
        * cp1.c: Clean up comments which describe FP formats.
692
         (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
693
 
694
2002-06-03  Chris Demetriou  
695
            Ed Satterthwaite  
696
 
697
        * configure.in (mipsisa64sb1*-*-*): New target for supporting
698
        Broadcom SiByte SB-1 processor configurations.
699
        * configure: Regenerate.
700
        * sb1.igen: New file.
701
        * mips.igen: Include sb1.igen.
702
        (sb1): New model.
703
        * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
704
        * mdmx.igen: Add "sb1" model to all appropriate functions and
705
        instructions.
706
        * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
707
        (ob_func, ob_acc): Reference the above.
708
        (qh_acc): Adjust to keep the same size as ob_acc.
709
        * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
710
        (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
711
 
712
2002-06-03  Chris Demetriou  
713
 
714
        * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
715
 
716
2002-06-02  Chris Demetriou  
717
            Ed Satterthwaite  
718
 
719
        * mips.igen (mdmx): New (pseudo-)model.
720
        * mdmx.c, mdmx.igen: New files.
721
        * Makefile.in (SIM_OBJS): Add mdmx.o.
722
        * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
723
        New typedefs.
724
        (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
725
        (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
726
        (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
727
        (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
728
        (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
729
        (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
730
        (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
731
        (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
732
        (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
733
        (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
734
        (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
735
        (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
736
        (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
737
        (qh_fmtsel): New macros.
738
        (_sim_cpu): New member "acc".
739
        (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
740
        (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
741
 
742
2002-05-01  Chris Demetriou  
743
 
744
        * interp.c: Use 'deprecated' rather than 'depreciated.'
745
        * sim-main.h: Likewise.
746
 
747
2002-05-01  Chris Demetriou  
748
 
749
        * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
750
        which wouldn't compile anyway.
751
        * sim-main.h (unpredictable_action): New function prototype.
752
        (Unpredictable): Define to call igen function unpredictable().
753
        (NotWordValue): New macro to call igen function not_word_value().
754
        (UndefinedResult): Remove.
755
        * interp.c (undefined_result): Remove.
756
        (unpredictable_action): New function.
757
        * mips.igen (not_word_value, unpredictable): New functions.
758
        (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
759
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
760
        (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
761
        NotWordValue() to check for unpredictable inputs, then
762
        Unpredictable() to handle them.
763
 
764
2002-02-24  Chris Demetriou  
765
 
766
        * mips.igen: Fix formatting of calls to Unpredictable().
767
 
768
2002-04-20  Andrew Cagney  
769
 
770
        * interp.c (sim_open): Revert previous change.
771
 
772
2002-04-18  Alexandre Oliva  
773
 
774
        * interp.c (sim_open): Disable chunk of code that wrote code in
775
        vector table entries.
776
 
777
2002-03-19  Chris Demetriou  
778
 
779
        * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
780
        (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
781
        unused definitions.
782
 
783
2002-03-19  Chris Demetriou  
784
 
785
        * cp1.c: Fix many formatting issues.
786
 
787
2002-03-19  Chris G. Demetriou  
788
 
789
        * cp1.c (fpu_format_name): New function to replace...
790
        (DOFMT): This.  Delete, and update all callers.
791
        (fpu_rounding_mode_name): New function to replace...
792
        (RMMODE): This.  Delete, and update all callers.
793
 
794
2002-03-19  Chris G. Demetriou  
795
 
796
        * interp.c: Move FPU support routines from here to...
797
        * cp1.c: Here.  New file.
798
        * Makefile.in (SIM_OBJS): Add cp1.o to object list.
799
        (cp1.o): New target.
800
 
801
2002-03-12  Chris Demetriou  
802
 
803
        * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
804
        * mips.igen (mips32, mips64): New models, add to all instructions
805
        and functions as appropriate.
806
        (loadstore_ea, check_u64): New variant for model mips64.
807
        (check_fmt_p): New variant for models mipsV and mips64, remove
808
        mipsV model marking fro other variant.
809
        (SLL) Rename to...
810
        (SLLa) this.
811
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
812
        for mips32 and mips64.
813
        (DCLO, DCLZ): New instructions for mips64.
814
 
815
2002-03-07  Chris Demetriou  
816
 
817
        * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
818
        immediate or code as a hex value with the "%#lx" format.
819
        (ANDI): Likewise, and fix printed instruction name.
820
 
821
2002-03-05  Chris Demetriou  
822
 
823
        * sim-main.h (UndefinedResult, Unpredictable): New macros
824
        which currently do nothing.
825
 
826
2002-03-05  Chris Demetriou  
827
 
828
        * sim-main.h (status_UX, status_SX, status_KX, status_TS)
829
        (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
830
        (status_CU3): New definitions.
831
 
832
        * sim-main.h (ExceptionCause): Add new values for MIPS32
833
        and MIPS64: MDMX, MCheck, CacheErr.  Update comments
834
        for DebugBreakPoint and NMIReset to note their status in
835
        MIPS32 and MIPS64.
836
        (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
837
        (SignalExceptionCacheErr): New exception macros.
838
 
839
2002-03-05  Chris Demetriou  
840
 
841
        * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
842
        * sim-main.h (COP_Usable): Define, but for now coprocessor 1
843
        is always enabled.
844
        (SignalExceptionCoProcessorUnusable): Take as argument the
845
        unusable coprocessor number.
846
 
847
2002-03-05  Chris Demetriou  
848
 
849
        * mips.igen: Fix formatting of all SignalException calls.
850
 
851
2002-03-05  Chris Demetriou  
852
 
853
        * sim-main.h (SIGNEXTEND): Remove.
854
 
855
2002-03-04  Chris Demetriou  
856
 
857
        * mips.igen: Remove gencode comment from top of file, fix
858
        spelling in another comment.
859
 
860
2002-03-04  Chris Demetriou  
861
 
862
        * mips.igen (check_fmt, check_fmt_p): New functions to check
863
        whether specific floating point formats are usable.
864
        (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
865
        (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
866
        (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
867
        Use the new functions.
868
        (do_c_cond_fmt): Remove format checks...
869
        (C.cond.fmta, C.cond.fmtb): And move them into all callers.
870
 
871
2002-03-03  Chris Demetriou  
872
 
873
        * mips.igen: Fix formatting of check_fpu calls.
874
 
875
2002-03-03  Chris Demetriou  
876
 
877
        * mips.igen (FLOOR.L.fmt): Store correct destination register.
878
 
879
2002-03-03  Chris Demetriou  
880
 
881
        * mips.igen: Remove whitespace at end of lines.
882
 
883
2002-03-02  Chris Demetriou  
884
 
885
        * mips.igen (loadstore_ea): New function to do effective
886
        address calculations.
887
        (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
888
        do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
889
        CACHE): Use loadstore_ea to do effective address computations.
890
 
891
2002-03-02  Chris Demetriou  
892
 
893
        * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
894
        * mips.igen (LL, CxC1, MxC1): Likewise.
895
 
896
2002-03-02  Chris Demetriou  
897
 
898
        * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
899
        CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
900
        FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
901
        MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
902
        NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
903
        SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
904
        Don't split opcode fields by hand, use the opcode field values
905
        provided by igen.
906
 
907
2002-03-01  Chris Demetriou  
908
 
909
        * mips.igen (do_divu): Fix spacing.
910
 
911
        * mips.igen (do_dsllv): Move to be right before DSLLV,
912
        to match the rest of the do_ functions.
913
 
914
2002-03-01  Chris Demetriou  
915
 
916
        * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
917
        DSRL32, do_dsrlv): Trace inputs and results.
918
 
919
2002-03-01  Chris Demetriou  
920
 
921
        * mips.igen (CACHE): Provide instruction-printing string.
922
 
923
        * interp.c (signal_exception): Comment tokens after #endif.
924
 
925
2002-02-28  Chris Demetriou  
926
 
927
        * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
928
        (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
929
        NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
930
        ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
931
        CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
932
        C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
933
        SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
934
        LWC1, SWC1): Add "f" to filter, since these are FP instructions.
935
 
936
2002-02-28  Chris Demetriou  
937
 
938
        * mips.igen (DSRA32, DSRAV): Fix order of arguments in
939
        instruction-printing string.
940
        (LWU): Use '64' as the filter flag.
941
 
942
2002-02-28  Chris Demetriou  
943
 
944
        * mips.igen (SDXC1): Fix instruction-printing string.
945
 
946
2002-02-28  Chris Demetriou  
947
 
948
        * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
949
        filter flags "32,f".
950
 
951
2002-02-27  Chris Demetriou  
952
 
953
        * mips.igen (PREFX): This is a 64-bit instruction, use '64'
954
        as the filter flag.
955
 
956
2002-02-27  Chris Demetriou  
957
 
958
        * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
959
        add a comma) so that it more closely match the MIPS ISA
960
        documentation opcode partitioning.
961
        (PREF): Put useful names on opcode fields, and include
962
        instruction-printing string.
963
 
964
2002-02-27  Chris Demetriou  
965
 
966
        * mips.igen (check_u64): New function which in the future will
967
        check whether 64-bit instructions are usable and signal an
968
        exception if not.  Currently a no-op.
969
        (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
970
        DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
971
        DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
972
        LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
973
 
974
        * mips.igen (check_fpu): New function which in the future will
975
        check whether FPU instructions are usable and signal an exception
976
        if not.  Currently a no-op.
977
        (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
978
        CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
979
        CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
980
        LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
981
        MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
982
        NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
983
        ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
984
        SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
985
 
986
2002-02-27  Chris Demetriou  
987
 
988
        * mips.igen (do_load_left, do_load_right): Move to be immediately
989
        following do_load.
990
        (do_store_left, do_store_right): Move to be immediately following
991
        do_store.
992
 
993
2002-02-27  Chris Demetriou  
994
 
995
        * mips.igen (mipsV): New model name.  Also, add it to
996
        all instructions and functions where it is appropriate.
997
 
998
2002-02-18  Chris Demetriou  
999
 
1000
        * mips.igen: For all functions and instructions, list model
1001
        names that support that instruction one per line.
1002
 
1003
2002-02-11  Chris Demetriou  
1004
 
1005
        * mips.igen: Add some additional comments about supported
1006
        models, and about which instructions go where.
1007
        (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1008
        order as is used in the rest of the file.
1009
 
1010
2002-02-11  Chris Demetriou  
1011
 
1012
        * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1013
        indicating that ALU32_END or ALU64_END are there to check
1014
        for overflow.
1015
        (DADD): Likewise, but also remove previous comment about
1016
        overflow checking.
1017
 
1018
2002-02-10  Chris Demetriou  
1019
 
1020
        * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1021
        DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1022
        JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1023
        SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1024
        ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1025
        fields (i.e., add and move commas) so that they more closely
1026
        match the MIPS ISA documentation opcode partitioning.
1027
 
1028
2002-02-10  Chris Demetriou  
1029
 
1030
        * mips.igen (ADDI): Print immediate value.
1031
        (BREAK): Print code.
1032
        (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1033
        (SLL): Print "nop" specially, and don't run the code
1034
        that does the shift for the "nop" case.
1035
 
1036
2001-11-17  Fred Fish  
1037
 
1038
        * sim-main.h (float_operation): Move enum declaration outside
1039
        of _sim_cpu struct declaration.
1040
 
1041
2001-04-12  Jim Blandy  
1042
 
1043
        * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1044
        PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1045
        set of the FCSR.
1046
        * sim-main.h (COCIDX): Remove definition; this isn't supported by
1047
        PENDING_FILL, and you can get the intended effect gracefully by
1048
        calling PENDING_SCHED directly.
1049
 
1050
2001-02-23  Ben Elliston  
1051
 
1052
        * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1053
        already defined elsewhere.
1054
 
1055
2001-02-19  Ben Elliston  
1056
 
1057
        * sim-main.h (sim_monitor): Return an int.
1058
        * interp.c (sim_monitor): Add return values.
1059
        (signal_exception): Handle error conditions from sim_monitor.
1060
 
1061
2001-02-08  Ben Elliston  
1062
 
1063
        * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1064
        (store_memory): Likewise, pass cia to sim_core_write*.
1065
 
1066
2000-10-19  Frank Ch. Eigler  
1067
 
1068
        On advice from Chris G. Demetriou :
1069
        * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1070
 
1071
Thu Jul 27 22:02:05 2000  Andrew Cagney  
1072
 
1073
        From Maciej W. Rozycki :
1074
        * Makefile.in: Don't delete *.igen when cleaning directory.
1075
 
1076
Wed Jul 19 18:50:51 2000  Andrew Cagney  
1077
 
1078
        * m16.igen (break): Call SignalException not sim_engine_halt.
1079
 
1080
Mon Jul  3 11:13:20 2000  Andrew Cagney  
1081
 
1082
        From Jason Eckhardt:
1083
        * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1084
 
1085
Tue Jun 13 20:52:07 2000  Andrew Cagney  
1086
 
1087
        * mips.igen (MxC1, DMxC1): Fix printf formatting.
1088
 
1089
2000-05-24  Michael Hayes  
1090
 
1091
        * mips.igen (do_dmultx): Fix typo.
1092
 
1093
Tue May 23 21:39:23 2000  Andrew Cagney  
1094
 
1095
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1096
 
1097
Fri Apr 28 20:48:36 2000  Andrew Cagney  
1098
 
1099
        * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1100
 
1101
2000-04-12  Frank Ch. Eigler  
1102
 
1103
        * sim-main.h (GPR_CLEAR): Define macro.
1104
 
1105
Mon Apr 10 00:07:09 2000  Andrew Cagney  
1106
 
1107
        * interp.c (decode_coproc): Output long using %lx and not %s.
1108
 
1109
2000-03-21  Frank Ch. Eigler  
1110
 
1111
        * interp.c (sim_open): Sort & extend dummy memory regions for
1112
        --board=jmr3904 for eCos.
1113
 
1114
2000-03-02  Frank Ch. Eigler  
1115
 
1116
        * configure: Regenerated.
1117
 
1118
Tue Feb  8 18:35:01 2000  Donald Lindsay  
1119
 
1120
        * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1121
        calls, conditional on the simulator being in verbose mode.
1122
 
1123
Fri Feb  4 09:45:15 2000  Donald Lindsay  
1124
 
1125
        * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1126
        cache don't get ReservedInstruction traps.
1127
 
1128
1999-11-29  Mark Salter  
1129
 
1130
        * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1131
        to clear status bits in sdisr register. This is how the hardware works.
1132
 
1133
        * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1134
        being used by cygmon.
1135
 
1136
1999-11-11  Andrew Haley  
1137
 
1138
        * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1139
        instructions.
1140
 
1141
Thu Sep  9 15:12:08 1999  Geoffrey Keating  
1142
 
1143
        * mips.igen (MULT): Correct previous mis-applied patch.
1144
 
1145
Tue Sep  7 13:34:54 1999  Geoffrey Keating  
1146
 
1147
        * mips.igen (delayslot32): Handle sequence like
1148
        mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1149
        correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1150
        (MULT): Actually pass the third register...
1151
 
1152
1999-09-03  Mark Salter  
1153
 
1154
        * interp.c (sim_open): Added more memory aliases for additional
1155
        hardware being touched by cygmon on jmr3904 board.
1156
 
1157
Thu Sep  2 18:15:53 1999  Andrew Cagney  
1158
 
1159
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1160
 
1161
Tue Jul 27 16:36:51 1999  Andrew Cagney  
1162
 
1163
        * interp.c (sim_store_register): Handle case where client - GDB -
1164
        specifies that a 4 byte register is 8 bytes in size.
1165
        (sim_fetch_register): Ditto.
1166
 
1167
1999-07-14  Frank Ch. Eigler  
1168
 
1169
        Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1170
        * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1171
        (idt_monitor_base): Base address for IDT monitor traps.
1172
        (pmon_monitor_base): Ditto for PMON.
1173
        (lsipmon_monitor_base): Ditto for LSI PMON.
1174
        (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1175
        (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1176
        (sim_firmware_command): New function.
1177
        (mips_option_handler): Call it for OPTION_FIRMWARE.
1178
        (sim_open): Allocate memory for idt_monitor region.  If "--board"
1179
        option was given, add no monitor by default.  Add BREAK hooks only if
1180
        monitors are also there.
1181
 
1182
Mon Jul 12 00:02:27 1999  Andrew Cagney  
1183
 
1184
        * interp.c (sim_monitor): Flush output before reading input.
1185
 
1186
Sun Jul 11 19:28:11 1999  Andrew Cagney  
1187
 
1188
        * tconfig.in (SIM_HANDLES_LMA): Always define.
1189
 
1190
Thu Jul  8 16:06:59 1999  Andrew Cagney  
1191
 
1192
        From Mark Salter :
1193
        * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1194
        (sim_open): Add setup for BSP board.
1195
 
1196
Wed Jul  7 12:45:58 1999  Andrew Cagney  
1197
 
1198
        * mips.igen (MULT, MULTU): Add syntax for two operand version.
1199
        (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1200
        them as unimplemented.
1201
 
1202
1999-05-08  Felix Lee  
1203
 
1204
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1205
 
1206
1999-04-21  Frank Ch. Eigler  
1207
 
1208
        * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1209
 
1210
Thu Apr 15 14:15:17 1999  Andrew Cagney  
1211
 
1212
        * configure.in: Any mips64vr5*-*-* target should have
1213
        -DTARGET_ENABLE_FR=1.
1214
        (default_endian): Any mips64vr*el-*-* target should default to
1215
        LITTLE_ENDIAN.
1216
        * configure: Re-generate.
1217
 
1218
1999-02-19  Gavin Romig-Koch  
1219
 
1220
        * mips.igen (ldl): Extend from _16_, not 32.
1221
 
1222
Wed Jan 27 18:51:38 1999  Andrew Cagney  
1223
 
1224
        * interp.c (sim_store_register): Force registers written to by GDB
1225
        into an un-interpreted state.
1226
 
1227
1999-02-05  Frank Ch. Eigler  
1228
 
1229
        * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1230
        CPU, start periodic background I/O polls.
1231
        (tx3904sio_poll): New function: periodic I/O poller.
1232
 
1233
1998-12-30  Frank Ch. Eigler  
1234
 
1235
        * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1236
 
1237
Tue Dec 29 16:03:53 1998  Rainer Orth  
1238
 
1239
        * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1240
        case statement.
1241
 
1242
1998-12-29  Frank Ch. Eigler  
1243
 
1244
        * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1245
        (load_word): Call SIM_CORE_SIGNAL hook on error.
1246
        (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1247
        starting.  For exception dispatching, pass PC instead of NULL_CIA.
1248
        (decode_coproc): Use COP0_BADVADDR to store faulting address.
1249
        * sim-main.h (COP0_BADVADDR): Define.
1250
        (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1251
        (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1252
        (_sim_cpu): Add exc_* fields to store register value snapshots.
1253
        * mips.igen (*): Replace memory-related SignalException* calls
1254
        with references to SIM_CORE_SIGNAL hook.
1255
 
1256
        * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1257
        fix.
1258
        * sim-main.c (*): Minor warning cleanups.
1259
 
1260
1998-12-24  Gavin Romig-Koch  
1261
 
1262
        * m16.igen (DADDIU5): Correct type-o.
1263
 
1264
Mon Dec 21 10:34:48 1998  Andrew Cagney  
1265
 
1266
        * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1267
        variables.
1268
 
1269
Wed Dec 16 18:20:28 1998  Andrew Cagney  
1270
 
1271
        * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1272
        to include path.
1273
        (interp.o): Add dependency on itable.h
1274
        (oengine.c, gencode): Delete remaining references.
1275
        (BUILT_SRC_FROM_GEN): Clean up.
1276
 
1277
1998-12-16  Gavin Romig-Koch  
1278
 
1279
        * vr4run.c: New.
1280
        * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1281
        tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1282
        tmp-run-hack) : New.
1283
        * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1284
        DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1285
        Drop the "64" qualifier to get the HACK generator working.
1286
        Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1287
        * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1288
        qualifier to get the hack generator working.
1289
        (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1290
        (DSLL): Use do_dsll.
1291
        (DSLLV): Use do_dsllv.
1292
        (DSRA): Use do_dsra.
1293
        (DSRL): Use do_dsrl.
1294
        (DSRLV): Use do_dsrlv.
1295
        (BC1): Move *vr4100 to get the HACK generator working.
1296
        (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1297
        get the HACK generator working.
1298
        (MACC) Rename to get the HACK generator working.
1299
        (DMACC,MACCS,DMACCS): Add the 64.
1300
 
1301
1998-12-12  Gavin Romig-Koch  
1302
 
1303
        * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1304
        * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1305
 
1306
1998-12-11  Gavin Romig-Koch  
1307
 
1308
    * mips/interp.c (DEBUG): Cleanups.
1309
 
1310
1998-12-10  Frank Ch. Eigler  
1311
 
1312
        * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1313
        (tx3904sio_tickle): fflush after a stdout character output.
1314
 
1315
1998-12-03  Frank Ch. Eigler  
1316
 
1317
        * interp.c (sim_close): Uninstall modules.
1318
 
1319
Wed Nov 25 13:41:03 1998  Andrew Cagney  
1320
 
1321
        * sim-main.h, interp.c (sim_monitor): Change to global
1322
        function.
1323
 
1324
Wed Nov 25 17:33:24 1998  Andrew Cagney  
1325
 
1326
        * configure.in (vr4100): Only include vr4100 instructions in
1327
        simulator.
1328
        * configure: Re-generate.
1329
        * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1330
 
1331
Mon Nov 23 18:20:36 1998  Andrew Cagney  
1332
 
1333
        * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1334
        * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1335
        true alternative.
1336
 
1337
        * configure.in (sim_default_gen, sim_use_gen): Replace with
1338
        sim_gen.
1339
        (--enable-sim-igen): Delete config option. Always using IGEN.
1340
        * configure: Re-generate.
1341
 
1342
        * Makefile.in (gencode): Kill, kill, kill.
1343
        * gencode.c: Ditto.
1344
 
1345
Mon Nov 23 18:07:36 1998  Andrew Cagney  
1346
 
1347
        * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1348
        bit mips16 igen simulator.
1349
        * configure: Re-generate.
1350
 
1351
        * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1352
        as part of vr4100 ISA.
1353
        * vr.igen: Mark all instructions as 64 bit only.
1354
 
1355
Mon Nov 23 17:07:37 1998  Andrew Cagney  
1356
 
1357
        * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1358
        Pacify GCC.
1359
 
1360
Mon Nov 23 13:23:40 1998  Andrew Cagney  
1361
 
1362
        * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1363
        mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1364
        * configure: Re-generate.
1365
 
1366
        * m16.igen (BREAK): Define breakpoint instruction.
1367
        (JALX32): Mark instruction as mips16 and not r3900.
1368
        * mips.igen (C.cond.fmt): Fix typo in instruction format.
1369
 
1370
        * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1371
 
1372
Sat Nov  7 09:54:38 1998  Andrew Cagney  
1373
 
1374
        * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1375
        insn as a debug breakpoint.
1376
 
1377
        * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1378
        pending.slot_size.
1379
        (PENDING_SCHED): Clean up trace statement.
1380
        (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1381
        (PENDING_FILL): Delay write by only one cycle.
1382
        (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1383
 
1384
        * sim-main.c (pending_tick): Clean up trace statements. Add trace
1385
        of pending writes.
1386
        (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1387
        32 & 64.
1388
        (pending_tick): Move incrementing of index to FOR statement.
1389
        (pending_tick): Only update PENDING_OUT after a write has occured.
1390
 
1391
        * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1392
        build simulator.
1393
        * configure: Re-generate.
1394
 
1395
        * interp.c (sim_engine_run OLD): Delete explicit call to
1396
        PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1397
 
1398
Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  
1399
 
1400
        * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1401
        interrupt level number to match changed SignalExceptionInterrupt
1402
        macro.
1403
 
1404
Fri Oct  9 18:02:25 1998  Doug Evans  
1405
 
1406
        * interp.c: #include "itable.h" if WITH_IGEN.
1407
        (get_insn_name): New function.
1408
        (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1409
        * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1410
 
1411
Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  
1412
 
1413
        * configure: Rebuilt to inhale new common/aclocal.m4.
1414
 
1415
Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  
1416
 
1417
        * dv-tx3904sio.c: Include sim-assert.h.
1418
 
1419
Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  
1420
 
1421
        * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1422
        * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1423
        Reorganize target-specific sim-hardware checks.
1424
        * configure: rebuilt.
1425
        * interp.c (sim_open): For tx39 target boards, set
1426
        OPERATING_ENVIRONMENT, add tx3904sio devices.
1427
        * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1428
        ROM executables.  Install dv-sockser into sim-modules list.
1429
 
1430
        * dv-tx3904irc.c: Compiler warning clean-up.
1431
        * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1432
        frequent hw-trace messages.
1433
 
1434
Fri Jul 31 18:14:16 1998  Andrew Cagney  
1435
 
1436
        * vr.igen (MulAcc): Identify as a vr4100 specific function.
1437
 
1438
Sat Jul 25 16:03:14 1998  Andrew Cagney  
1439
 
1440
        * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1441
 
1442
        * vr.igen: New file.
1443
        (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1444
        * mips.igen: Define vr4100 model. Include vr.igen.
1445
Mon Jun 29 09:21:07 1998  Gavin Koch  
1446
 
1447
        * mips.igen (check_mf_hilo): Correct check.
1448
 
1449
Wed Jun 17 12:20:49 1998  Andrew Cagney  
1450
 
1451
        * sim-main.h (interrupt_event): Add prototype.
1452
 
1453
        * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1454
        register_ptr, register_value.
1455
        (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1456
 
1457
        * sim-main.h (tracefh): Make extern.
1458
 
1459
Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  
1460
 
1461
        * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1462
        Reduce unnecessarily high timer event frequency.
1463
        * dv-tx3904cpu.c: Ditto for interrupt event.
1464
 
1465
Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  
1466
 
1467
        * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1468
        to allay warnings.
1469
        (interrupt_event): Made non-static.
1470
 
1471
        * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1472
        interchange of configuration values for external vs. internal
1473
        clock dividers.
1474
 
1475
Tue Jun  9 12:46:24 1998  Ian Carmichael  
1476
 
1477
        * mips.igen (BREAK): Moved code to here for
1478
        simulator-reserved break instructions.
1479
        * gencode.c (build_instruction): Ditto.
1480
        * interp.c (signal_exception): Code moved from here.  Non-
1481
        reserved instructions now use exception vector, rather
1482
        than halting sim.
1483
        * sim-main.h: Moved magic constants to here.
1484
 
1485
Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  
1486
 
1487
        * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1488
        register upon non-zero interrupt event level, clear upon zero
1489
        event value.
1490
        * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1491
        by passing zero event value.
1492
        (*_io_{read,write}_buffer): Endianness fixes.
1493
        * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1494
        (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1495
 
1496
        * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1497
        serial I/O and timer module at base address 0xFFFF0000.
1498
 
1499
Tue Jun  9 11:52:29 1998  Gavin Koch  
1500
 
1501
        * mips.igen (SWC1) : Correct the handling of ReverseEndian
1502
        and BigEndianCPU.
1503
 
1504
Tue Jun  9 11:40:57 1998  Gavin Koch  
1505
 
1506
        * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1507
        parts.
1508
        * configure: Update.
1509
 
1510
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  
1511
 
1512
        * dv-tx3904tmr.c: New file - implements tx3904 timer.
1513
        * dv-tx3904{irc,cpu}.c: Mild reformatting.
1514
        * configure.in: Include tx3904tmr in hw_device list.
1515
        * configure: Rebuilt.
1516
        * interp.c (sim_open): Instantiate three timer instances.
1517
        Fix address typo of tx3904irc instance.
1518
 
1519
Tue Jun  2 15:48:02 1998  Ian Carmichael  
1520
 
1521
        * interp.c (signal_exception): SystemCall exception now uses
1522
        the exception vector.
1523
 
1524
Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  
1525
 
1526
        * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1527
        to allay warnings.
1528
 
1529
Fri May 29 11:40:39 1998  Andrew Cagney  
1530
 
1531
        * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1532
 
1533
Mon May 25 20:47:45 1998  Andrew Cagney  
1534
 
1535
        * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1536
 
1537
        * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1538
        sim-main.h. Declare a struct hw_descriptor instead of struct
1539
        hw_device_descriptor.
1540
 
1541
Mon May 25 12:41:38 1998  Andrew Cagney  
1542
 
1543
        * mips.igen (do_store_left, do_load_left): Compute nr of left and
1544
        right bits and then re-align left hand bytes to correct byte
1545
        lanes.  Fix incorrect computation in do_store_left when loading
1546
        bytes from second word.
1547
 
1548
Fri May 22 13:34:20 1998  Andrew Cagney  
1549
 
1550
        * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1551
        * interp.c (sim_open): Only create a device tree when HW is
1552
        enabled.
1553
 
1554
        * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1555
        * interp.c (signal_exception): Ditto.
1556
 
1557
Thu May 21 14:24:11 1998  Gavin Koch  
1558
 
1559
        * gencode.c: Mark BEGEZALL as LIKELY.
1560
 
1561
Thu May 21 18:57:19 1998  Andrew Cagney  
1562
 
1563
        * sim-main.h (ALU32_END): Sign extend 32 bit results.
1564
        * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1565
 
1566
Mon May 18 18:22:42 1998  Frank Ch. Eigler  
1567
 
1568
        * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1569
        modules.  Recognize TX39 target with "mips*tx39" pattern.
1570
        * configure: Rebuilt.
1571
        * sim-main.h (*): Added many macros defining bits in
1572
        TX39 control registers.
1573
        (SignalInterrupt): Send actual PC instead of NULL.
1574
        (SignalNMIReset): New exception type.
1575
        * interp.c (board): New variable for future use to identify
1576
        a particular board being simulated.
1577
        (mips_option_handler,mips_options): Added "--board" option.
1578
        (interrupt_event): Send actual PC.
1579
        (sim_open): Make memory layout conditional on board setting.
1580
        (signal_exception): Initial implementation of hardware interrupt
1581
        handling.  Accept another break instruction variant for simulator
1582
        exit.
1583
        (decode_coproc): Implement RFE instruction for TX39.
1584
        (mips.igen): Decode RFE instruction as such.
1585
        * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1586
        * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1587
        bbegin to implement memory map.
1588
        * dv-tx3904cpu.c: New file.
1589
        * dv-tx3904irc.c: New file.
1590
 
1591
Wed May 13 14:40:11 1998  Gavin Koch  
1592
 
1593
        * mips.igen (check_mt_hilo): Create a separate r3900 version.
1594
 
1595
Wed May 13 14:11:46 1998  Gavin Koch  
1596
 
1597
        * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1598
        with calls to check_div_hilo.
1599
 
1600
Wed May 13 09:59:27 1998  Gavin Koch  
1601
 
1602
        * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1603
        Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1604
        Add special r3900 version of do_mult_hilo.
1605
        (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1606
        with calls to check_mult_hilo.
1607
        (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1608
        with calls to check_div_hilo.
1609
 
1610
Tue May 12 15:22:11 1998  Andrew Cagney  
1611
 
1612
        * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1613
        Document a replacement.
1614
 
1615
Fri May  8 17:48:19 1998  Ian Carmichael  
1616
 
1617
        * interp.c (sim_monitor): Make mon_printf work.
1618
 
1619
Wed May  6 19:42:19 1998  Doug Evans  
1620
 
1621
        * sim-main.h (INSN_NAME): New arg `cpu'.
1622
 
1623
Tue Apr 28 18:33:31 1998  Geoffrey Noer  
1624
 
1625
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1626
 
1627
Sun Apr 26 15:31:55 1998  Tom Tromey  
1628
 
1629
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1630
        * config.in: Ditto.
1631
 
1632
Sun Apr 26 15:20:01 1998  Tom Tromey  
1633
 
1634
        * acconfig.h: New file.
1635
        * configure.in: Reverted change of Apr 24; use sinclude again.
1636
 
1637
Fri Apr 24 14:16:40 1998  Tom Tromey  
1638
 
1639
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1640
        * config.in: Ditto.
1641
 
1642
Fri Apr 24 11:19:20 1998  Tom Tromey  
1643
 
1644
        * configure.in: Don't call sinclude.
1645
 
1646
Fri Apr 24 11:35:01 1998  Andrew Cagney  
1647
 
1648
        * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1649
 
1650
Tue Apr 21 11:59:50 1998  Andrew Cagney  
1651
 
1652
        * mips.igen (ERET): Implement.
1653
 
1654
        * interp.c (decode_coproc): Return sign-extended EPC.
1655
 
1656
        * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1657
 
1658
        * interp.c (signal_exception): Do not ignore Trap.
1659
        (signal_exception): On TRAP, restart at exception address.
1660
        (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1661
        (signal_exception): Update.
1662
        (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1663
        so that TRAP instructions are caught.
1664
 
1665
Mon Apr 20 11:26:55 1998  Andrew Cagney  
1666
 
1667
        * sim-main.h (struct hilo_access, struct hilo_history): Define,
1668
        contains HI/LO access history.
1669
        (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1670
        (HIACCESS, LOACCESS): Delete, replace with
1671
        (HIHISTORY, LOHISTORY): New macros.
1672
        (CHECKHILO): Delete all, moved to mips.igen
1673
 
1674
        * gencode.c (build_instruction): Do not generate checks for
1675
        correct HI/LO register usage.
1676
 
1677
        * interp.c (old_engine_run): Delete checks for correct HI/LO
1678
        register usage.
1679
 
1680
        * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1681
        check_mf_cycles): New functions.
1682
        (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1683
        do_divu, domultx, do_mult, do_multu): Use.
1684
 
1685
        * tx.igen ("madd", "maddu"): Use.
1686
 
1687
Wed Apr 15 18:31:54 1998  Andrew Cagney  
1688
 
1689
        * mips.igen (DSRAV): Use function do_dsrav.
1690
        (SRAV): Use new function do_srav.
1691
 
1692
        * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1693
        (B): Sign extend 11 bit immediate.
1694
        (EXT-B*): Shift 16 bit immediate left by 1.
1695
        (ADDIU*): Don't sign extend immediate value.
1696
 
1697
Wed Apr 15 10:32:15 1998  Andrew Cagney  
1698
 
1699
        * m16run.c (sim_engine_run): Restore CIA after handling an event.
1700
 
1701
        * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1702
        functions.
1703
 
1704
        * mips.igen (delayslot32, nullify_next_insn): New functions.
1705
        (m16.igen): Always include.
1706
        (do_*): Add more tracing.
1707
 
1708
        * m16.igen (delayslot16): Add NIA argument, could be called by a
1709
        32 bit MIPS16 instruction.
1710
 
1711
        * interp.c (ifetch16): Move function from here.
1712
        * sim-main.c (ifetch16): To here.
1713
 
1714
        * sim-main.c (ifetch16, ifetch32): Update to match current
1715
        implementations of LH, LW.
1716
        (signal_exception): Don't print out incorrect hex value of illegal
1717
        instruction.
1718
 
1719
Wed Apr 15 00:17:25 1998  Andrew Cagney  
1720
 
1721
        * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1722
        instruction.
1723
 
1724
        * m16.igen: Implement MIPS16 instructions.
1725
 
1726
        * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1727
        do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1728
        do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1729
        do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1730
        do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1731
        bodies of corresponding code from 32 bit insn to these.  Also used
1732
        by MIPS16 versions of functions.
1733
 
1734
        * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1735
        (IMEM16): Drop NR argument from macro.
1736
 
1737
Sat Apr  4 22:39:50 1998  Andrew Cagney  
1738
 
1739
        * Makefile.in (SIM_OBJS): Add sim-main.o.
1740
 
1741
        * sim-main.h (address_translation, load_memory, store_memory,
1742
        cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1743
        as INLINE_SIM_MAIN.
1744
        (pr_addr, pr_uword64): Declare.
1745
        (sim-main.c): Include when H_REVEALS_MODULE_P.
1746
 
1747
        * interp.c (address_translation, load_memory, store_memory,
1748
        cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1749
        from here.
1750
        * sim-main.c: To here. Fix compilation problems.
1751
 
1752
        * configure.in: Enable inlining.
1753
        * configure: Re-config.
1754
 
1755
Sat Apr  4 20:36:25 1998  Andrew Cagney  
1756
 
1757
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1758
 
1759
Fri Apr  3 04:32:35 1998  Andrew Cagney  
1760
 
1761
        * mips.igen: Include tx.igen.
1762
        * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1763
        * tx.igen: New file, contains MADD and MADDU.
1764
 
1765
        * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1766
        the hardwired constant `7'.
1767
        (store_memory): Ditto.
1768
        (LOADDRMASK): Move definition to sim-main.h.
1769
 
1770
        mips.igen (MTC0): Enable for r3900.
1771
        (ADDU): Add trace.
1772
 
1773
        mips.igen (do_load_byte): Delete.
1774
        (do_load, do_store, do_load_left, do_load_write, do_store_left,
1775
        do_store_right): New functions.
1776
        (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1777
 
1778
        configure.in: Let the tx39 use igen again.
1779
        configure: Update.
1780
 
1781
Thu Apr  2 10:59:39 1998  Andrew Cagney  
1782
 
1783
        * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1784
        not an address sized quantity.  Return zero for cache sizes.
1785
 
1786
Wed Apr  1 23:47:53 1998  Andrew Cagney  
1787
 
1788
        * mips.igen (r3900): r3900 does not support 64 bit integer
1789
        operations.
1790
 
1791
Mon Mar 30 14:46:05 1998  Gavin Koch  
1792
 
1793
        * configure.in (mipstx39*-*-*): Use gencode simulator rather
1794
        than igen one.
1795
        * configure : Rebuild.
1796
 
1797
Fri Mar 27 16:15:52 1998  Andrew Cagney  
1798
 
1799
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1800
 
1801
Fri Mar 27 15:01:50 1998  Andrew Cagney  
1802
 
1803
        * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1804
 
1805
Wed Mar 25 16:44:27 1998  Ian Carmichael  
1806
 
1807
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1808
        * config.in: Regenerated to track ../common/aclocal.m4 changes.
1809
 
1810
Wed Mar 25 12:35:29 1998  Andrew Cagney  
1811
 
1812
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1813
 
1814
Wed Mar 25 10:05:46 1998  Andrew Cagney  
1815
 
1816
        * interp.c (Max, Min): Comment out functions. Not yet used.
1817
 
1818
Wed Mar 18 12:38:12 1998  Andrew Cagney  
1819
 
1820
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1821
 
1822
Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  
1823
 
1824
        * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1825
        configurable settings for stand-alone simulator.
1826
 
1827
        * configure.in: Added X11 search, just in case.
1828
 
1829
        * configure: Regenerated.
1830
 
1831
Wed Mar 11 14:09:10 1998  Andrew Cagney  
1832
 
1833
        * interp.c (sim_write, sim_read, load_memory, store_memory):
1834
        Replace sim_core_*_map with read_map, write_map, exec_map resp.
1835
 
1836
Tue Mar  3 13:58:43 1998  Andrew Cagney  
1837
 
1838
        * sim-main.h (GETFCC): Return an unsigned value.
1839
 
1840
Tue Mar  3 13:21:37 1998  Andrew Cagney  
1841
 
1842
        * mips.igen (DIV): Fix check for -1 / MIN_INT.
1843
        (DADD): Result destination is RD not RT.
1844
 
1845
Fri Feb 27 13:49:49 1998  Andrew Cagney  
1846
 
1847
        * sim-main.h (HIACCESS, LOACCESS): Always define.
1848
 
1849
        * mdmx.igen (Maxi, Mini): Rename Max, Min.
1850
 
1851
        * interp.c (sim_info): Delete.
1852
 
1853
Fri Feb 27 18:41:01 1998  Doug Evans  
1854
 
1855
        * interp.c (DECLARE_OPTION_HANDLER): Use it.
1856
        (mips_option_handler): New argument `cpu'.
1857
        (sim_open): Update call to sim_add_option_table.
1858
 
1859
Wed Feb 25 18:56:22 1998  Andrew Cagney  
1860
 
1861
        * mips.igen (CxC1): Add tracing.
1862
 
1863
Fri Feb 20 17:43:21 1998  Andrew Cagney  
1864
 
1865
        * sim-main.h (Max, Min): Declare.
1866
 
1867
        * interp.c (Max, Min): New functions.
1868
 
1869
        * mips.igen (BC1): Add tracing.
1870
 
1871
Thu Feb 19 14:50:00 1998  John Metzler  
1872
 
1873
        * interp.c Added memory map for stack in vr4100
1874
 
1875
Thu Feb 19 10:21:21 1998  Gavin Koch  
1876
 
1877
        * interp.c (load_memory): Add missing "break"'s.
1878
 
1879
Tue Feb 17 12:45:35 1998  Andrew Cagney  
1880
 
1881
        * interp.c (sim_store_register, sim_fetch_register): Pass in
1882
        length parameter.  Return -1.
1883
 
1884
Tue Feb 10 11:57:40 1998  Ian Carmichael  
1885
 
1886
        * interp.c: Added hardware init hook, fixed warnings.
1887
 
1888
Sat Feb  7 17:16:20 1998  Andrew Cagney  
1889
 
1890
        * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1891
 
1892
Tue Feb  3 11:36:02 1998  Andrew Cagney  
1893
 
1894
        * interp.c (ifetch16): New function.
1895
 
1896
        * sim-main.h (IMEM32): Rename IMEM.
1897
        (IMEM16_IMMED): Define.
1898
        (IMEM16): Define.
1899
        (DELAY_SLOT): Update.
1900
 
1901
        * m16run.c (sim_engine_run): New file.
1902
 
1903
        * m16.igen: All instructions except LB.
1904
        (LB): Call do_load_byte.
1905
        * mips.igen (do_load_byte): New function.
1906
        (LB): Call do_load_byte.
1907
 
1908
        * mips.igen: Move spec for insn bit size and high bit from here.
1909
        * Makefile.in (tmp-igen, tmp-m16): To here.
1910
 
1911
        * m16.dc: New file, decode mips16 instructions.
1912
 
1913
        * Makefile.in (SIM_NO_ALL): Define.
1914
        (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1915
 
1916
Tue Feb  3 11:28:00 1998  Andrew Cagney  
1917
 
1918
        * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1919
        point unit to 32 bit registers.
1920
        * configure: Re-generate.
1921
 
1922
Sun Feb  1 15:47:14 1998  Andrew Cagney  
1923
 
1924
        * configure.in (sim_use_gen): Make IGEN the default simulator
1925
        generator for generic 32 and 64 bit mips targets.
1926
        * configure: Re-generate.
1927
 
1928
Sun Feb  1 16:52:37 1998  Andrew Cagney  
1929
 
1930
        * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1931
        bitsize.
1932
 
1933
        * interp.c (sim_fetch_register, sim_store_register): Read/write
1934
        FGR from correct location.
1935
        (sim_open): Set size of FGR's according to
1936
        WITH_TARGET_FLOATING_POINT_BITSIZE.
1937
 
1938
        * sim-main.h (FGR): Store floating point registers in a separate
1939
        array.
1940
 
1941
Sun Feb  1 16:47:51 1998  Andrew Cagney  
1942
 
1943
        * configure: Regenerated to track ../common/aclocal.m4 changes.
1944
 
1945
Tue Feb  3 00:10:50 1998  Andrew Cagney  
1946
 
1947
        * interp.c (ColdReset): Call PENDING_INVALIDATE.
1948
 
1949
        * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1950
 
1951
        * interp.c (pending_tick): New function.  Deliver pending writes.
1952
 
1953
        * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1954
        PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1955
        it can handle mixed sized quantites and single bits.
1956
 
1957
Mon Feb  2 17:43:15 1998  Andrew Cagney  
1958
 
1959
        * interp.c (oengine.h): Do not include when building with IGEN.
1960
        (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1961
        (sim_info): Ditto for PROCESSOR_64BIT.
1962
        (sim_monitor): Replace ut_reg with unsigned_word.
1963
        (*): Ditto for t_reg.
1964
        (LOADDRMASK): Define.
1965
        (sim_open): Remove defunct check that host FP is IEEE compliant,
1966
        using software to emulate floating point.
1967
        (value_fpr, ...): Always compile, was conditional on HASFPU.
1968
 
1969
Sun Feb  1 11:15:29 1998  Andrew Cagney  
1970
 
1971
        * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1972
        size.
1973
 
1974
        * interp.c (SD, CPU): Define.
1975
        (mips_option_handler): Set flags in each CPU.
1976
        (interrupt_event): Assume CPU 0 is the one being iterrupted.
1977
        (sim_close): Do not clear STATE, deleted anyway.
1978
        (sim_write, sim_read): Assume CPU zero's vm should be used for
1979
        data transfers.
1980
        (sim_create_inferior): Set the PC for all processors.
1981
        (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1982
        argument.
1983
        (mips16_entry): Pass correct nr of args to store_word, load_word.
1984
        (ColdReset): Cold reset all cpu's.
1985
        (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1986
        (sim_monitor, load_memory, store_memory, signal_exception): Use
1987
        `CPU' instead of STATE_CPU.
1988
 
1989
 
1990
        * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1991
        SD or CPU_.
1992
 
1993
        * sim-main.h (signal_exception): Add sim_cpu arg.
1994
        (SignalException*): Pass both SD and CPU to signal_exception.
1995
        * interp.c (signal_exception): Update.
1996
 
1997
        * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1998
        Ditto
1999
        (sync_operation, prefetch, cache_op, store_memory, load_memory,
2000
        address_translation): Ditto
2001
        (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2002
 
2003
Sat Jan 31 18:15:41 1998  Andrew Cagney  
2004
 
2005
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2006
 
2007
Sat Jan 31 14:49:24 1998  Andrew Cagney  
2008
 
2009
        * interp.c (sim_engine_run): Add `nr_cpus' argument.
2010
 
2011
        * mips.igen (model): Map processor names onto BFD name.
2012
 
2013
        * sim-main.h (CPU_CIA): Delete.
2014
        (SET_CIA, GET_CIA): Define
2015
 
2016
Wed Jan 21 16:16:27 1998  Andrew Cagney  
2017
 
2018
        * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2019
        regiser.
2020
 
2021
        * configure.in (default_endian): Configure a big-endian simulator
2022
        by default.
2023
        * configure: Re-generate.
2024
 
2025
Mon Jan 19 22:26:29 1998  Doug Evans  
2026
 
2027
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2028
 
2029
Mon Jan  5 20:38:54 1998  Mark Alexander  
2030
 
2031
        * interp.c (sim_monitor): Handle Densan monitor outbyte
2032
        and inbyte functions.
2033
 
2034
1997-12-29  Felix Lee  
2035
 
2036
        * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2037
 
2038
Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2039
 
2040
        * Makefile.in (tmp-igen): Arrange for $zero to always be
2041
        reset to zero after every instruction.
2042
 
2043
Mon Dec 15 23:17:11 1997  Andrew Cagney  
2044
 
2045
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2046
        * config.in: Ditto.
2047
 
2048
Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2049
 
2050
        * mips.igen (MSUB): Fix to work like MADD.
2051
        * gencode.c (MSUB): Similarly.
2052
 
2053
Thu Dec  4 09:21:05 1997  Doug Evans  
2054
 
2055
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2056
 
2057
Wed Nov 26 11:00:23 1997  Andrew Cagney  
2058
 
2059
        * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2060
 
2061
Sun Nov 23 01:45:20 1997  Andrew Cagney  
2062
 
2063
        * sim-main.h (sim-fpu.h): Include.
2064
 
2065
        * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2066
        Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2067
        using host independant sim_fpu module.
2068
 
2069
Thu Nov 20 19:56:22 1997  Andrew Cagney  
2070
 
2071
        * interp.c (signal_exception): Report internal errors with SIGABRT
2072
        not SIGQUIT.
2073
 
2074
        * sim-main.h (C0_CONFIG): New register.
2075
        (signal.h): No longer include.
2076
 
2077
        * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2078
 
2079
Tue Nov 18 15:33:48 1997  Doug Evans  
2080
 
2081
        * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2082
 
2083
Fri Nov 14 11:56:48 1997  Andrew Cagney  
2084
 
2085
        * mips.igen: Tag vr5000 instructions.
2086
        (ANDI): Was missing mipsIV model, fix assembler syntax.
2087
        (do_c_cond_fmt): New function.
2088
        (C.cond.fmt): Handle mips I-III which do not support CC field
2089
        separatly.
2090
        (bc1): Handle mips IV which do not have a delaed FCC separatly.
2091
        (SDR): Mask paddr when BigEndianMem, not the converse as specified
2092
        in IV3.2 spec.
2093
        (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2094
        vr5000 which saves LO in a GPR separatly.
2095
 
2096
        * configure.in (enable-sim-igen): For vr5000, select vr5000
2097
        specific instructions.
2098
        * configure: Re-generate.
2099
 
2100
Wed Nov 12 14:42:52 1997  Andrew Cagney  
2101
 
2102
        * Makefile.in (SIM_OBJS): Add sim-fpu module.
2103
 
2104
        * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2105
        fmt_uninterpreted_64 bit cases to switch.  Convert to
2106
        fmt_formatted,
2107
 
2108
        * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2109
 
2110
        * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2111
        as specified in IV3.2 spec.
2112
        (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2113
 
2114
Tue Nov 11 12:38:23 1997  Andrew Cagney  
2115
 
2116
        * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2117
        (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2118
        (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2119
        PENDING_FILL versions of instructions.  Simplify.
2120
        (X): New function.
2121
        (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2122
        instructions.
2123
        (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2124
        a signed value.
2125
        (MTHI, MFHI): Disable code checking HI-LO.
2126
 
2127
        * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2128
        global.
2129
        (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2130
 
2131
Thu Nov  6 16:36:35 1997  Andrew Cagney  
2132
 
2133
        * gencode.c (build_mips16_operands): Replace IPC with cia.
2134
 
2135
        * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2136
        value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2137
        IPC to `cia'.
2138
        (UndefinedResult): Replace function with macro/function
2139
        combination.
2140
        (sim_engine_run): Don't save PC in IPC.
2141
 
2142
        * sim-main.h (IPC): Delete.
2143
 
2144
 
2145
        * interp.c (signal_exception, store_word, load_word,
2146
        address_translation, load_memory, store_memory, cache_op,
2147
        prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2148
        cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2149
        current instruction address - cia - argument.
2150
        (sim_read, sim_write): Call address_translation directly.
2151
        (sim_engine_run): Rename variable vaddr to cia.
2152
        (signal_exception): Pass cia to sim_monitor
2153
 
2154
        * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2155
        Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2156
        COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2157
 
2158
        * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2159
        * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2160
        SIM_ASSERT.
2161
 
2162
        * interp.c (signal_exception): Pass restart address to
2163
        sim_engine_restart.
2164
 
2165
        * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2166
        idecode.o): Add dependency.
2167
 
2168
        * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2169
        Delete definitions
2170
        (DELAY_SLOT): Update NIA not PC with branch address.
2171
        (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2172
 
2173
        * mips.igen: Use CIA not PC in branch calculations.
2174
        (illegal): Call SignalException.
2175
        (BEQ, ADDIU): Fix assembler.
2176
 
2177
Wed Nov  5 12:19:56 1997  Andrew Cagney  
2178
 
2179
        * m16.igen (JALX): Was missing.
2180
 
2181
        * configure.in (enable-sim-igen): New configuration option.
2182
        * configure: Re-generate.
2183
 
2184
        * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2185
 
2186
        * interp.c (load_memory, store_memory): Delete parameter RAW.
2187
        (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2188
        bypassing {load,store}_memory.
2189
 
2190
        * sim-main.h (ByteSwapMem): Delete definition.
2191
 
2192
        * Makefile.in (SIM_OBJS): Add sim-memopt module.
2193
 
2194
        * interp.c (sim_do_command, sim_commands): Delete mips specific
2195
        commands.  Handled by module sim-options.
2196
 
2197
        * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2198
        (WITH_MODULO_MEMORY): Define.
2199
 
2200
        * interp.c (sim_info): Delete code printing memory size.
2201
 
2202
        * interp.c (mips_size): Nee sim_size, delete function.
2203
        (power2): Delete.
2204
        (monitor, monitor_base, monitor_size): Delete global variables.
2205
        (sim_open, sim_close): Delete code creating monitor and other
2206
        memory regions.  Use sim-memopts module, via sim_do_commandf, to
2207
        manage memory regions.
2208
        (load_memory, store_memory): Use sim-core for memory model.
2209
 
2210
        * interp.c (address_translation): Delete all memory map code
2211
        except line forcing 32 bit addresses.
2212
 
2213
Wed Nov  5 11:21:11 1997  Andrew Cagney  
2214
 
2215
        * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2216
        trace options.
2217
 
2218
        * interp.c (logfh, logfile): Delete globals.
2219
        (sim_open, sim_close): Delete code opening & closing log file.
2220
        (mips_option_handler): Delete -l and -n options.
2221
        (OPTION mips_options): Ditto.
2222
 
2223
        * interp.c (OPTION mips_options): Rename option trace to dinero.
2224
        (mips_option_handler): Update.
2225
 
2226
Wed Nov  5 09:35:59 1997  Andrew Cagney  
2227
 
2228
        * interp.c (fetch_str): New function.
2229
        (sim_monitor): Rewrite using sim_read & sim_write.
2230
        (sim_open): Check magic number.
2231
        (sim_open): Write monitor vectors into memory using sim_write.
2232
        (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2233
        (sim_read, sim_write): Simplify - transfer data one byte at a
2234
        time.
2235
        (load_memory, store_memory): Clarify meaning of parameter RAW.
2236
 
2237
        * sim-main.h (isHOST): Defete definition.
2238
        (isTARGET): Mark as depreciated.
2239
        (address_translation): Delete parameter HOST.
2240
 
2241
        * interp.c (address_translation): Delete parameter HOST.
2242
 
2243
Wed Oct 29 11:13:56 1997  Andrew Cagney  
2244
 
2245
        * mips.igen:
2246
 
2247
        * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2248
        (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2249
 
2250
Tue Oct 28 11:06:47 1997  Andrew Cagney  
2251
 
2252
        * mips.igen: Add model filter field to records.
2253
 
2254
Mon Oct 27 17:53:59 1997  Andrew Cagney  
2255
 
2256
        * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2257
 
2258
        interp.c (sim_engine_run): Do not compile function sim_engine_run
2259
        when WITH_IGEN == 1.
2260
 
2261
        * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2262
        target architecture.
2263
 
2264
        Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2265
        igen. Replace with configuration variables sim_igen_flags /
2266
        sim_m16_flags.
2267
 
2268
        * m16.igen: New file.  Copy mips16 insns here.
2269
        * mips.igen: From here.
2270
 
2271
Mon Oct 27 13:53:59 1997  Andrew Cagney  
2272
 
2273
        * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2274
        to top.
2275
        (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2276
 
2277
Sat Oct 25 16:51:40 1997  Gavin Koch  
2278
 
2279
        * gencode.c (build_instruction): Follow sim_write's lead in using
2280
        BigEndianMem instead of !ByteSwapMem.
2281
 
2282
Fri Oct 24 17:41:49 1997  Andrew Cagney  
2283
 
2284
        * configure.in (sim_gen): Dependent on target, select type of
2285
        generator.  Always select old style generator.
2286
 
2287
        configure: Re-generate.
2288
 
2289
        Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2290
        targets.
2291
        (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2292
        SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2293
        IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2294
        (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2295
        SIM_@sim_gen@_*, set by autoconf.
2296
 
2297
Wed Oct 22 12:52:06 1997  Andrew Cagney  
2298
 
2299
        * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2300
 
2301
        * interp.c (ColdReset): Remove #ifdef HASFPU, check
2302
        CURRENT_FLOATING_POINT instead.
2303
 
2304
        * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2305
        (address_translation): Raise exception InstructionFetch when
2306
        translation fails and isINSTRUCTION.
2307
 
2308
        * interp.c (sim_open, sim_write, sim_monitor, store_word,
2309
        sim_engine_run): Change type of of vaddr and paddr to
2310
        address_word.
2311
        (address_translation, prefetch, load_memory, store_memory,
2312
        cache_op): Change type of vAddr and pAddr to address_word.
2313
 
2314
        * gencode.c (build_instruction): Change type of vaddr and paddr to
2315
        address_word.
2316
 
2317
Mon Oct 20 15:29:04 1997  Andrew Cagney  
2318
 
2319
        * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2320
        macro to obtain result of ALU op.
2321
 
2322
Tue Oct 21 17:39:14 1997  Andrew Cagney  
2323
 
2324
        * interp.c (sim_info): Call profile_print.
2325
 
2326
Mon Oct 20 13:31:20 1997  Andrew Cagney  
2327
 
2328
        * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2329
 
2330
        * sim-main.h (WITH_PROFILE): Do not define, defined in
2331
        common/sim-config.h.  Use sim-profile module.
2332
        (simPROFILE): Delete defintion.
2333
 
2334
        * interp.c (PROFILE): Delete definition.
2335
        (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2336
        (sim_close): Delete code writing profile histogram.
2337
        (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2338
        Delete.
2339
        (sim_engine_run): Delete code profiling the PC.
2340
 
2341
Mon Oct 20 13:31:20 1997  Andrew Cagney  
2342
 
2343
        * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2344
 
2345
        * interp.c (sim_monitor): Make register pointers of type
2346
        unsigned_word*.
2347
 
2348
        * sim-main.h: Make registers of type unsigned_word not
2349
        signed_word.
2350
 
2351
Thu Oct 16 10:31:39 1997  Andrew Cagney  
2352
 
2353
        * interp.c (sync_operation): Rename from SyncOperation, make
2354
        global, add SD argument.
2355
        (prefetch): Rename from Prefetch, make global, add SD argument.
2356
        (decode_coproc): Make global.
2357
 
2358
        * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2359
 
2360
        * gencode.c (build_instruction): Generate DecodeCoproc not
2361
        decode_coproc calls.
2362
 
2363
        * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2364
        (SizeFGR): Move to sim-main.h
2365
        (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2366
        simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2367
        (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2368
        sim-main.h.
2369
        (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2370
        FP_RM_TOMINF, GETRM): Move to sim-main.h.
2371
        (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2372
        isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2373
        (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2374
        BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2375
 
2376
        * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2377
        exception.
2378
        (sim-alu.h): Include.
2379
        (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2380
        (sim_cia): Typedef to instruction_address.
2381
 
2382
Thu Oct 16 10:31:41 1997  Andrew Cagney  
2383
 
2384
        * Makefile.in (interp.o): Rename generated file engine.c to
2385
        oengine.c.
2386
 
2387
        * interp.c: Update.
2388
 
2389
Thu Oct 16 10:31:40 1997  Andrew Cagney  
2390
 
2391
        * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2392
 
2393
Thu Oct 16 10:31:39 1997  Andrew Cagney  
2394
 
2395
        * gencode.c (build_instruction): For "FPSQRT", output correct
2396
        number of arguments to Recip.
2397
 
2398
Tue Oct 14 17:38:18 1997  Andrew Cagney  
2399
 
2400
        * Makefile.in (interp.o): Depends on sim-main.h
2401
 
2402
        * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2403
 
2404
        * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2405
        ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2406
        (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2407
        STATE, DSSTATE): Define
2408
        (GPR, FGRIDX, ..): Define.
2409
 
2410
        * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2411
        pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2412
        (GPR, FGRIDX, ...): Delete macros.
2413
 
2414
        * interp.c: Update names to match defines from sim-main.h
2415
 
2416
Tue Oct 14 15:11:45 1997  Andrew Cagney  
2417
 
2418
        * interp.c (sim_monitor): Add SD argument.
2419
        (sim_warning): Delete.  Replace calls with calls to
2420
        sim_io_eprintf.
2421
        (sim_error): Delete. Replace calls with sim_io_error.
2422
        (open_trace, writeout32, writeout16, getnum): Add SD argument.
2423
        (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2424
        (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2425
        argument.
2426
        (mips_size): Rename from sim_size. Add SD argument.
2427
 
2428
        * interp.c (simulator): Delete global variable.
2429
        (callback): Delete global variable.
2430
        (mips_option_handler, sim_open, sim_write, sim_read,
2431
        sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2432
        sim_size,sim_monitor): Use sim_io_* not callback->*.
2433
        (sim_open): ZALLOC simulator struct.
2434
        (PROFILE): Do not define.
2435
 
2436
Tue Oct 14 13:35:48 1997  Andrew Cagney  
2437
 
2438
        * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2439
        support.h with corresponding code.
2440
 
2441
        * sim-main.h (word64, uword64), support.h: Move definition to
2442
        sim-main.h.
2443
        (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2444
 
2445
        * support.h: Delete
2446
        * Makefile.in: Update dependencies
2447
        * interp.c: Do not include.
2448
 
2449
Tue Oct 14 13:35:48 1997  Andrew Cagney  
2450
 
2451
        * interp.c (address_translation, load_memory, store_memory,
2452
        cache_op): Rename to from AddressTranslation et.al., make global,
2453
        add SD argument
2454
 
2455
        * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2456
        CacheOp): Define.
2457
 
2458
        * interp.c (SignalException): Rename to signal_exception, make
2459
        global.
2460
 
2461
        * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2462
 
2463
        * sim-main.h (SignalException, SignalExceptionInterrupt,
2464
        SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2465
        SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2466
        SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2467
        Define.
2468
 
2469
        * interp.c, support.h: Use.
2470
 
2471
Tue Oct 14 13:19:20 1997  Andrew Cagney  
2472
 
2473
        * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2474
        to value_fpr / store_fpr. Add SD argument.
2475
        (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2476
        Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2477
 
2478
        * sim-main.h (ValueFPR, StoreFPR): Define.
2479
 
2480
Tue Oct 14 13:06:55 1997  Andrew Cagney  
2481
 
2482
        * interp.c (sim_engine_run): Check consistency between configure
2483
        WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2484
        and HASFPU.
2485
 
2486
        * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2487
        (mips_fpu): Configure WITH_FLOATING_POINT.
2488
        (mips_endian): Configure WITH_TARGET_ENDIAN.
2489
        * configure: Update.
2490
 
2491
Fri Oct  3 09:28:00 1997  Andrew Cagney  
2492
 
2493
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2494
 
2495
Mon Sep 29 14:45:00 1997  Bob Manson  
2496
 
2497
        * configure: Regenerated.
2498
 
2499
Fri Sep 26 12:48:18 1997  Mark Alexander  
2500
 
2501
        * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2502
 
2503
Thu Sep 25 11:15:22 1997  Andrew Cagney  
2504
 
2505
        * gencode.c (print_igen_insn_models): Assume certain architectures
2506
        include all mips* instructions.
2507
        (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2508
        instruction.
2509
 
2510
        * Makefile.in (tmp.igen): Add target. Generate igen input from
2511
        gencode file.
2512
 
2513
        * gencode.c (FEATURE_IGEN): Define.
2514
        (main): Add --igen option.  Generate output in igen format.
2515
        (process_instructions): Format output according to igen option.
2516
        (print_igen_insn_format): New function.
2517
        (print_igen_insn_models): New function.
2518
        (process_instructions): Only issue warnings and ignore
2519
        instructions when no FEATURE_IGEN.
2520
 
2521
Wed Sep 24 17:38:57 1997  Andrew Cagney  
2522
 
2523
        * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2524
        MIPS targets.
2525
 
2526
Tue Sep 23 11:04:38 1997  Andrew Cagney  
2527
 
2528
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2529
 
2530
Tue Sep 23 10:19:51 1997  Andrew Cagney  
2531
 
2532
        * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2533
        SIM_RESERVED_BITS): Delete, moved to common.
2534
        (SIM_EXTRA_CFLAGS): Update.
2535
 
2536
Mon Sep 22 11:46:20 1997  Andrew Cagney  
2537
 
2538
        * configure.in: Configure non-strict memory alignment.
2539
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2540
 
2541
Fri Sep 19 17:45:25 1997  Andrew Cagney  
2542
 
2543
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2544
 
2545
Sat Sep 20 14:07:28 1997  Gavin Koch  
2546
 
2547
        * gencode.c (SDBBP,DERET): Added (3900) insns.
2548
        (RFE): Turn on for 3900.
2549
        * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2550
        (dsstate): Made global.
2551
        (SUBTARGET_R3900): Added.
2552
        (CANCELDELAYSLOT): New.
2553
        (SignalException): Ignore SystemCall rather than ignore and
2554
        terminate.  Add DebugBreakPoint handling.
2555
        (decode_coproc): New insns RFE, DERET; and new registers Debug
2556
        and DEPC protected by SUBTARGET_R3900.
2557
        (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2558
        bits explicitly.
2559
        * Makefile.in,configure.in: Add mips subtarget option.
2560
        * configure: Update.
2561
 
2562
Fri Sep 19 09:33:27 1997  Gavin Koch  
2563
 
2564
        * gencode.c: Add r3900 (tx39).
2565
 
2566
 
2567
Tue Sep 16 15:52:04 1997  Gavin Koch  
2568
 
2569
        * gencode.c (build_instruction): Don't need to subtract 4 for
2570
        JALR, just 2.
2571
 
2572
Tue Sep 16 11:32:28 1997  Gavin Koch  
2573
 
2574
        * interp.c: Correct some HASFPU problems.
2575
 
2576
Mon Sep 15 17:36:15 1997  Andrew Cagney  
2577
 
2578
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2579
 
2580
Fri Sep 12 12:01:39 1997  Andrew Cagney  
2581
 
2582
        * interp.c (mips_options): Fix samples option short form, should
2583
        be `x'.
2584
 
2585
Thu Sep 11 09:35:29 1997  Andrew Cagney  
2586
 
2587
        * interp.c (sim_info): Enable info code.  Was just returning.
2588
 
2589
Tue Sep  9 17:30:57 1997  Andrew Cagney  
2590
 
2591
        * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2592
        MFC0.
2593
 
2594
Tue Sep  9 16:28:28 1997  Andrew Cagney  
2595
 
2596
        * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2597
        constants.
2598
        (build_instruction): Ditto for LL.
2599
 
2600
Thu Sep  4 17:21:23 1997  Doug Evans  
2601
 
2602
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2603
 
2604
Wed Aug 27 18:13:22 1997  Andrew Cagney  
2605
 
2606
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2607
        * config.in: Ditto.
2608
 
2609
Wed Aug 27 14:12:27 1997  Andrew Cagney  
2610
 
2611
        * interp.c (sim_open): Add call to sim_analyze_program, update
2612
        call to sim_config.
2613
 
2614
Tue Aug 26 10:40:07 1997  Andrew Cagney  
2615
 
2616
        * interp.c (sim_kill): Delete.
2617
        (sim_create_inferior): Add ABFD argument. Set PC from same.
2618
        (sim_load): Move code initializing trap handlers from here.
2619
        (sim_open): To here.
2620
        (sim_load): Delete, use sim-hload.c.
2621
 
2622
        * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2623
 
2624
Mon Aug 25 17:50:22 1997  Andrew Cagney  
2625
 
2626
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2627
        * config.in: Ditto.
2628
 
2629
Mon Aug 25 15:59:48 1997  Andrew Cagney  
2630
 
2631
        * interp.c (sim_open): Add ABFD argument.
2632
        (sim_load): Move call to sim_config from here.
2633
        (sim_open): To here.  Check return status.
2634
 
2635
Fri Jul 25 15:00:45 1997  Gavin Koch  
2636
 
2637
        * gencode.c (build_instruction): Two arg MADD should
2638
        not assign result to $0.
2639
 
2640
Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2641
 
2642
        * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2643
        * sim/mips/configure.in: Regenerate.
2644
 
2645
Wed Jul  9 10:29:21 1997  Andrew Cagney  
2646
 
2647
        * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2648
        signed8, unsigned8 et.al. types.
2649
 
2650
        * interp.c (SUB_REG_FETCH): Handle both little and big endian
2651
        hosts when selecting subreg.
2652
 
2653
Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2654
 
2655
        * interp.c (sim_engine_run): Reset the ZERO register to zero
2656
        regardless of FEATURE_WARN_ZERO.
2657
        * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2658
 
2659
Wed Jun  4 10:43:14 1997  Andrew Cagney  
2660
 
2661
        * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2662
        (SignalException): For BreakPoints ignore any mode bits and just
2663
        save the PC.
2664
        (SignalException): Always set the CAUSE register.
2665
 
2666
Tue Jun  3 05:00:33 1997  Andrew Cagney  
2667
 
2668
        * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2669
        exception has been taken.
2670
 
2671
        * interp.c: Implement the ERET and mt/f sr instructions.
2672
 
2673
Sat May 31 00:44:16 1997  Andrew Cagney  
2674
 
2675
        * interp.c (SignalException): Don't bother restarting an
2676
        interrupt.
2677
 
2678
Fri May 30 23:41:48 1997  Andrew Cagney  
2679
 
2680
        * interp.c (SignalException): Really take an interrupt.
2681
        (interrupt_event): Only deliver interrupts when enabled.
2682
 
2683
Tue May 27 20:08:06 1997  Andrew Cagney  
2684
 
2685
        * interp.c (sim_info): Only print info when verbose.
2686
        (sim_info) Use sim_io_printf for output.
2687
 
2688
Tue May 27 14:22:23 1997  Andrew Cagney  
2689
 
2690
        * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2691
        mips architectures.
2692
 
2693
Tue May 27 14:22:23 1997  Andrew Cagney  
2694
 
2695
        * interp.c (sim_do_command): Check for common commands if a
2696
        simulator specific command fails.
2697
 
2698
Thu May 22 09:32:03 1997  Gavin Koch  
2699
 
2700
        * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2701
        and simBE when DEBUG is defined.
2702
 
2703
Wed May 21 09:08:10 1997  Andrew Cagney  
2704
 
2705
        * interp.c (interrupt_event): New function.  Pass exception event
2706
        onto exception handler.
2707
 
2708
        * configure.in: Check for stdlib.h.
2709
        * configure: Regenerate.
2710
 
2711
        * gencode.c (build_instruction): Add UNUSED attribute to tempS
2712
        variable declaration.
2713
        (build_instruction): Initialize memval1.
2714
        (build_instruction): Add UNUSED attribute to byte, bigend,
2715
        reverse.
2716
        (build_operands): Ditto.
2717
 
2718
        * interp.c: Fix GCC warnings.
2719
        (sim_get_quit_code): Delete.
2720
 
2721
        * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2722
        * Makefile.in: Ditto.
2723
        * configure: Re-generate.
2724
 
2725
        * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2726
 
2727
Tue May 20 15:08:56 1997  Andrew Cagney  
2728
 
2729
        * interp.c (mips_option_handler): New function parse argumes using
2730
        sim-options.
2731
        (myname): Replace with STATE_MY_NAME.
2732
        (sim_open): Delete check for host endianness - performed by
2733
        sim_config.
2734
        (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2735
        (sim_open): Move much of the initialization from here.
2736
        (sim_load): To here.  After the image has been loaded and
2737
        endianness set.
2738
        (sim_open): Move ColdReset from here.
2739
        (sim_create_inferior): To here.
2740
        (sim_open): Make FP check less dependant on host endianness.
2741
 
2742
        * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2743
        run.
2744
        * interp.c (sim_set_callbacks): Delete.
2745
 
2746
        * interp.c (membank, membank_base, membank_size): Replace with
2747
        STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2748
        (sim_open): Remove call to callback->init. gdb/run do this.
2749
 
2750
        * interp.c: Update
2751
 
2752
        * sim-main.h (SIM_HAVE_FLATMEM): Define.
2753
 
2754
        * interp.c (big_endian_p): Delete, replaced by
2755
        current_target_byte_order.
2756
 
2757
Tue May 20 13:55:00 1997  Andrew Cagney  
2758
 
2759
        * interp.c (host_read_long, host_read_word, host_swap_word,
2760
        host_swap_long): Delete. Using common sim-endian.
2761
        (sim_fetch_register, sim_store_register): Use H2T.
2762
        (pipeline_ticks): Delete.  Handled by sim-events.
2763
        (sim_info): Update.
2764
        (sim_engine_run): Update.
2765
 
2766
Tue May 20 13:42:03 1997  Andrew Cagney  
2767
 
2768
        * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2769
        reason from here.
2770
        (SignalException): To here. Signal using sim_engine_halt.
2771
        (sim_stop_reason): Delete, moved to common.
2772
 
2773
Tue May 20 10:19:48 1997  Andrew Cagney  
2774
 
2775
        * interp.c (sim_open): Add callback argument.
2776
        (sim_set_callbacks): Delete SIM_DESC argument.
2777
        (sim_size): Ditto.
2778
 
2779
Mon May 19 18:20:38 1997  Andrew Cagney  
2780
 
2781
        * Makefile.in (SIM_OBJS): Add common modules.
2782
 
2783
        * interp.c (sim_set_callbacks): Also set SD callback.
2784
        (set_endianness, xfer_*, swap_*): Delete.
2785
        (host_read_word, host_read_long, host_swap_word, host_swap_long):
2786
        Change to functions using sim-endian macros.
2787
        (control_c, sim_stop): Delete, use common version.
2788
        (simulate): Convert into.
2789
        (sim_engine_run): This function.
2790
        (sim_resume): Delete.
2791
 
2792
        * interp.c (simulation): New variable - the simulator object.
2793
        (sim_kind): Delete global - merged into simulation.
2794
        (sim_load): Cleanup.  Move PC assignment from here.
2795
        (sim_create_inferior): To here.
2796
 
2797
        * sim-main.h: New file.
2798
        * interp.c (sim-main.h): Include.
2799
 
2800
Thu Apr 24 00:39:51 1997  Doug Evans  
2801
 
2802
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2803
 
2804
Wed Apr 23 17:32:19 1997  Doug Evans  
2805
 
2806
        * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2807
 
2808
Mon Apr 21 17:16:13 1997  Gavin Koch  
2809
 
2810
        * gencode.c (build_instruction): DIV instructions: check
2811
        for division by zero and integer overflow before using
2812
        host's division operation.
2813
 
2814
Thu Apr 17 03:18:14 1997  Doug Evans  
2815
 
2816
        * Makefile.in (SIM_OBJS): Add sim-load.o.
2817
        * interp.c: #include bfd.h.
2818
        (target_byte_order): Delete.
2819
        (sim_kind, myname, big_endian_p): New static locals.
2820
        (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2821
        after argument parsing.  Recognize -E arg, set endianness accordingly.
2822
        (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2823
        load file into simulator.  Set PC from bfd.
2824
        (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2825
        (set_endianness): Use big_endian_p instead of target_byte_order.
2826
 
2827
Wed Apr 16 17:55:37 1997  Andrew Cagney  
2828
 
2829
        * interp.c (sim_size): Delete prototype - conflicts with
2830
        definition in remote-sim.h.  Correct definition.
2831
 
2832
Mon Apr  7 15:45:02 1997  Andrew Cagney  
2833
 
2834
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2835
        * config.in: Ditto.
2836
 
2837
Wed Apr  2 15:06:28 1997  Doug Evans  
2838
 
2839
        * interp.c (sim_open): New arg `kind'.
2840
 
2841
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2842
 
2843
Wed Apr  2 14:34:19 1997 Andrew Cagney 
2844
 
2845
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2846
 
2847
Tue Mar 25 11:38:22 1997  Doug Evans  
2848
 
2849
        * interp.c (sim_open): Set optind to 0 before calling getopt.
2850
 
2851
Wed Mar 19 01:14:00 1997  Andrew Cagney  
2852
 
2853
        * configure: Regenerated to track ../common/aclocal.m4 changes.
2854
 
2855
Mon Mar 17 10:52:59 1997  Gavin Koch  
2856
 
2857
        * interp.c : Replace uses of pr_addr with pr_uword64
2858
        where the bit length is always 64 independent of SIM_ADDR.
2859
        (pr_uword64) : added.
2860
 
2861
Mon Mar 17 15:10:07 1997  Andrew Cagney  
2862
 
2863
        * configure: Re-generate.
2864
 
2865
Fri Mar 14 10:34:11 1997  Michael Meissner  
2866
 
2867
        * configure: Regenerate to track ../common/aclocal.m4 changes.
2868
 
2869
Thu Mar 13 12:51:36 1997  Doug Evans  
2870
 
2871
        * interp.c (sim_open): New SIM_DESC result.  Argument is now
2872
        in argv form.
2873
        (other sim_*): New SIM_DESC argument.
2874
 
2875
Mon Feb 24 22:47:14 1997  Dawn Perchik  
2876
 
2877
        * interp.c: Fix printing of addresses for non-64-bit targets.
2878
        (pr_addr): Add function to print address based on size.
2879
 
2880
Wed Feb 19 14:42:09 1997  Mark Alexander  
2881
 
2882
        * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2883
 
2884
Thu Feb 13 14:08:30 1997  Ian Lance Taylor  
2885
 
2886
        * gencode.c (build_mips16_operands): Correct computation of base
2887
        address for extended PC relative instruction.
2888
 
2889
Thu Feb  6 17:16:15 1997  Ian Lance Taylor  
2890
 
2891
        * interp.c (mips16_entry): Add support for floating point cases.
2892
        (SignalException): Pass floating point cases to mips16_entry.
2893
        (ValueFPR): Don't restrict fmt_single and fmt_word to even
2894
        registers.
2895
        (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2896
        or fmt_word.
2897
        (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2898
        and then set the state to fmt_uninterpreted.
2899
        (COP_SW): Temporarily set the state to fmt_word while calling
2900
        ValueFPR.
2901
 
2902
Tue Feb  4 16:48:25 1997  Ian Lance Taylor  
2903
 
2904
        * gencode.c (build_instruction): The high order may be set in the
2905
        comparison flags at any ISA level, not just ISA 4.
2906
 
2907
Tue Feb  4 13:33:30 1997  Doug Evans  
2908
 
2909
        * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2910
        COMMON_{PRE,POST}_CONFIG_FRAG instead.
2911
        * configure.in: sinclude ../common/aclocal.m4.
2912
        * configure: Regenerated.
2913
 
2914
Fri Jan 31 11:11:45 1997  Ian Lance Taylor  
2915
 
2916
        * configure: Rebuild after change to aclocal.m4.
2917
 
2918
Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2919
 
2920
        * configure configure.in Makefile.in:  Update to new configure
2921
        scheme which is more compatible with WinGDB builds.
2922
        * configure.in:  Improve comment on how to run autoconf.
2923
        * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2924
        * Makefile.in:  Use autoconf substitution to install common
2925
        makefile fragment.
2926
 
2927
Wed Jan  8 12:39:03 1997  Jim Wilson  
2928
 
2929
        * gencode.c (build_instruction): Use BigEndianCPU instead of
2930
        ByteSwapMem.
2931
 
2932
Thu Jan 02 22:23:04 1997  Mark Alexander  
2933
 
2934
        * interp.c (sim_monitor): Make output to stdout visible in
2935
        wingdb's I/O log window.
2936
 
2937
Tue Dec 31 07:04:00 1996  Mark Alexander  
2938
 
2939
        * support.h: Undo previous change to SIGTRAP
2940
        and SIGQUIT values.
2941
 
2942
Mon Dec 30 17:36:06 1996  Ian Lance Taylor  
2943
 
2944
        * interp.c (store_word, load_word): New static functions.
2945
        (mips16_entry): New static function.
2946
        (SignalException): Look for mips16 entry and exit instructions.
2947
        (simulate): Use the correct index when setting fpr_state after
2948
        doing a pending move.
2949
 
2950
Sun Dec 29 09:37:18 1996  Mark Alexander  
2951
 
2952
        * interp.c: Fix byte-swapping code throughout to work on
2953
        both little- and big-endian hosts.
2954
 
2955
Sun Dec 29 09:18:32 1996  Mark Alexander  
2956
 
2957
        * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2958
        with gdb/config/i386/xm-windows.h.
2959
 
2960
Fri Dec 27 22:48:51 1996  Mark Alexander  
2961
 
2962
        * gencode.c (build_instruction): Work around MSVC++ code gen bug
2963
        that messes up arithmetic shifts.
2964
 
2965
Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2966
 
2967
        * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2968
        SIGTRAP and SIGQUIT for _WIN32.
2969
 
2970
Thu Dec 19 14:07:27 1996  Ian Lance Taylor  
2971
 
2972
        * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2973
        force a 64 bit multiplication.
2974
        (build_instruction) [OR]: In mips16 mode, don't do anything if the
2975
        destination register is 0, since that is the default mips16 nop
2976
        instruction.
2977
 
2978
Mon Dec 16 14:59:38 1996  Ian Lance Taylor  
2979
 
2980
        * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2981
        (build_endian_shift): Don't check proc64.
2982
        (build_instruction): Always set memval to uword64.  Cast op2 to
2983
        uword64 when shifting it left in memory instructions.  Always use
2984
        the same code for stores--don't special case proc64.
2985
 
2986
        * gencode.c (build_mips16_operands): Fix base PC value for PC
2987
        relative operands.
2988
        (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2989
        jal instruction.
2990
        * interp.c (simJALDELAYSLOT): Define.
2991
        (JALDELAYSLOT): Define.
2992
        (INDELAYSLOT, INJALDELAYSLOT): Define.
2993
        (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2994
 
2995
Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2996
 
2997
        * interp.c (sim_open): add flush_cache as a PMON routine
2998
        (sim_monitor): handle flush_cache by ignoring it
2999
 
3000
Wed Dec 11 13:53:51 1996  Jim Wilson  
3001
 
3002
        * gencode.c (build_instruction): Use !ByteSwapMem instead of
3003
        BigEndianMem.
3004
        * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3005
        (BigEndianMem): Rename to ByteSwapMem and change sense.
3006
        (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3007
        BigEndianMem references to !ByteSwapMem.
3008
        (set_endianness): New function, with prototype.
3009
        (sim_open): Call set_endianness.
3010
        (sim_info): Use simBE instead of BigEndianMem.
3011
        (xfer_direct_word, xfer_direct_long, swap_direct_word,
3012
        swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3013
        xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3014
        ifdefs, keeping the prototype declaration.
3015
        (swap_word): Rewrite correctly.
3016
        (ColdReset): Delete references to CONFIG.  Delete endianness related
3017
        code; moved to set_endianness.
3018
 
3019
Tue Dec 10 11:32:04 1996  Jim Wilson  
3020
 
3021
        * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3022
        * interp.c (CHECKHILO): Define away.
3023
        (simSIGINT): New macro.
3024
        (membank_size): Increase from 1MB to 2MB.
3025
        (control_c): New function.
3026
        (sim_resume): Rename parameter signal to signal_number.  Add local
3027
        variable prev.  Call signal before and after simulate.
3028
        (sim_stop_reason): Add simSIGINT support.
3029
        (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3030
        functions always.
3031
        (sim_warning): Delete call to SignalException.  Do call printf_filtered
3032
        if logfh is NULL.
3033
        (AddressTranslation): Add #ifdef DEBUG around debugging message and
3034
        a call to sim_warning.
3035
 
3036
Wed Nov 27 11:53:50 1996  Ian Lance Taylor  
3037
 
3038
        * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3039
        16 bit instructions.
3040
 
3041
Tue Nov 26 11:53:12 1996  Ian Lance Taylor  
3042
 
3043
        Add support for mips16 (16 bit MIPS implementation):
3044
        * gencode.c (inst_type): Add mips16 instruction encoding types.
3045
        (GETDATASIZEINSN): Define.
3046
        (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3047
        jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3048
        mtlo.
3049
        (MIPS16_DECODE): New table, for mips16 instructions.
3050
        (bitmap_val): New static function.
3051
        (struct mips16_op): Define.
3052
        (mips16_op_table): New table, for mips16 operands.
3053
        (build_mips16_operands): New static function.
3054
        (process_instructions): If PC is odd, decode a mips16
3055
        instruction.  Break out instruction handling into new
3056
        build_instruction function.
3057
        (build_instruction): New static function, broken out of
3058
        process_instructions.  Check modifiers rather than flags for SHIFT
3059
        bit count and m[ft]{hi,lo} direction.
3060
        (usage): Pass program name to fprintf.
3061
        (main): Remove unused variable this_option_optind.  Change
3062
        ``*loptarg++'' to ``loptarg++''.
3063
        (my_strtoul): Parenthesize && within ||.
3064
        * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3065
        (simulate): If PC is odd, fetch a 16 bit instruction, and
3066
        increment PC by 2 rather than 4.
3067
        * configure.in: Add case for mips16*-*-*.
3068
        * configure: Rebuild.
3069
 
3070
Fri Nov 22 08:49:36 1996  Mark Alexander  
3071
 
3072
        * interp.c: Allow -t to enable tracing in standalone simulator.
3073
        Fix garbage output in trace file and error messages.
3074
 
3075
Wed Nov 20 01:54:37 1996  Doug Evans  
3076
 
3077
        * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3078
        (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3079
        * configure.in: Simplify using macros in ../common/aclocal.m4.
3080
        * configure: Regenerated.
3081
        * tconfig.in: New file.
3082
 
3083
Tue Nov 12 13:34:00 1996  Dawn Perchik  
3084
 
3085
        * interp.c: Fix bugs in 64-bit port.
3086
        Use ansi function declarations for msvc compiler.
3087
        Initialize and test file pointer in trace code.
3088
        Prevent duplicate definition of LAST_EMED_REGNUM.
3089
 
3090
Tue Oct 15 11:07:06 1996  Mark Alexander  
3091
 
3092
        * interp.c (xfer_big_long): Prevent unwanted sign extension.
3093
 
3094
Thu Sep 26 17:35:00 1996  James G. Smith  
3095
 
3096
        * interp.c (SignalException): Check for explicit terminating
3097
        breakpoint value.
3098
        * gencode.c: Pass instruction value through SignalException()
3099
        calls for Trap, Breakpoint and Syscall.
3100
 
3101
Thu Sep 26 11:35:17 1996  James G. Smith  
3102
 
3103
        * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3104
        only used on those hosts that provide it.
3105
        * configure.in: Add sqrt() to list of functions to be checked for.
3106
        * config.in: Re-generated.
3107
        * configure: Re-generated.
3108
 
3109
Fri Sep 20 15:47:12 1996  Ian Lance Taylor  
3110
 
3111
        * gencode.c (process_instructions): Call build_endian_shift when
3112
        expanding STORE RIGHT, to fix swr.
3113
        * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3114
        clear the high bits.
3115
        * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3116
        Fix float to int conversions to produce signed values.
3117
 
3118
Thu Sep 19 15:34:17 1996  Ian Lance Taylor  
3119
 
3120
        * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3121
        (process_instructions): Correct handling of nor instruction.
3122
        Correct shift count for 32 bit shift instructions. Correct sign
3123
        extension for arithmetic shifts to not shift the number of bits in
3124
        the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3125
        unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3126
        Fix madd.
3127
        * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3128
        It's OK to have a mult follow a mult.  What's not OK is to have a
3129
        mult follow an mfhi.
3130
        (Convert): Comment out incorrect rounding code.
3131
 
3132
Mon Sep 16 11:38:16 1996  James G. Smith  
3133
 
3134
        * interp.c (sim_monitor): Improved monitor printf
3135
        simulation. Tidied up simulator warnings, and added "--log" option
3136
        for directing warning message output.
3137
        * gencode.c: Use sim_warning() rather than WARNING macro.
3138
 
3139
Thu Aug 22 15:03:12 1996  Ian Lance Taylor  
3140
 
3141
        * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3142
        getopt1.o, rather than on gencode.c.  Link objects together.
3143
        Don't link against -liberty.
3144
        (gencode.o, getopt.o, getopt1.o): New targets.
3145
        * gencode.c: Include  and "ansidecl.h".
3146
        (AND): Undefine after including "ansidecl.h".
3147
        (ULONG_MAX): Define if not defined.
3148
        (OP_*): Don't define macros; now defined in opcode/mips.h.
3149
        (main): Call my_strtoul rather than strtoul.
3150
        (my_strtoul): New static function.
3151
 
3152
Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3153
 
3154
        * gencode.c (process_instructions):  Generate word64 and uword64
3155
        instead of `long long' and `unsigned long long' data types.
3156
        * interp.c:  #include sysdep.h to get signals, and define default
3157
        for SIGBUS.
3158
        * (Convert):  Work around for Visual-C++ compiler bug with type
3159
        conversion.
3160
        * support.h:  Make things compile under Visual-C++ by using
3161
        __int64 instead of `long long'.  Change many refs to long long
3162
        into word64/uword64 typedefs.
3163
 
3164
Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3165
 
3166
        * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3167
        INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3168
        (docdir): Removed.
3169
        * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3170
        (AC_PROG_INSTALL): Added.
3171
        (AC_PROG_CC): Moved to before configure.host call.
3172
        * configure: Rebuilt.
3173
 
3174
Wed Jun  5 08:28:13 1996  James G. Smith  
3175
 
3176
        * configure.in: Define @SIMCONF@ depending on mips target.
3177
        * configure: Rebuild.
3178
        * Makefile.in (run): Add @SIMCONF@ to control simulator
3179
        construction.
3180
        * gencode.c: Change LOADDRMASK to 64bit memory model only.
3181
        * interp.c: Remove some debugging, provide more detailed error
3182
        messages, update memory accesses to use LOADDRMASK.
3183
 
3184
Mon Jun  3 11:55:03 1996  Ian Lance Taylor  
3185
 
3186
        * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3187
        AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3188
        stamp-h.
3189
        * configure: Rebuild.
3190
        * config.in: New file, generated by autoheader.
3191
        * interp.c: Include "config.h".  Include , ,
3192
        and  if they exist.  Replace #ifdef sun with #ifdef
3193
        HAVE_ANINT and HAVE_AINT, as appropriate.
3194
        * Makefile.in (run): Use @LIBS@ rather than -lm.
3195
        (interp.o): Depend upon config.h.
3196
        (Makefile): Just rebuild Makefile.
3197
        (clean): Remove stamp-h.
3198
        (mostlyclean): Make the same as clean, not as distclean.
3199
        (config.h, stamp-h): New targets.
3200
 
3201
Fri May 10 00:41:17 1996  James G. Smith  
3202
 
3203
        * interp.c (ColdReset): Fix boolean test. Make all simulator
3204
        globals static.
3205
 
3206
Wed May  8 15:12:58 1996  James G. Smith  
3207
 
3208
        * interp.c (xfer_direct_word, xfer_direct_long,
3209
        swap_direct_word, swap_direct_long, xfer_big_word,
3210
        xfer_big_long, xfer_little_word, xfer_little_long,
3211
        swap_word,swap_long): Added.
3212
        * interp.c (ColdReset): Provide function indirection to
3213
        host<->simulated_target transfer routines.
3214
        * interp.c (sim_store_register, sim_fetch_register): Updated to
3215
        make use of indirected transfer routines.
3216
 
3217
Fri Apr 19 15:48:24 1996  James G. Smith  
3218
 
3219
        * gencode.c (process_instructions): Ensure FP ABS instruction
3220
        recognised.
3221
        * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3222
        system call support.
3223
 
3224
Wed Apr 10 09:51:38 1996  James G. Smith  
3225
 
3226
        * interp.c (sim_do_command): Complain if callback structure not
3227
        initialised.
3228
 
3229
Thu Mar 28 13:50:51 1996  James G. Smith  
3230
 
3231
        * interp.c (Convert): Provide round-to-nearest and round-to-zero
3232
        support for Sun hosts.
3233
        * Makefile.in (gencode): Ensure the host compiler and libraries
3234
        used for cross-hosted build.
3235
 
3236
Wed Mar 27 14:42:12 1996  James G. Smith  
3237
 
3238
        * interp.c, gencode.c: Some more (TODO) tidying.
3239
 
3240
Thu Mar  7 11:19:33 1996  James G. Smith  
3241
 
3242
        * gencode.c, interp.c: Replaced explicit long long references with
3243
        WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3244
        * support.h (SET64LO, SET64HI): Macros added.
3245
 
3246
Wed Feb 21 12:16:21 1996  Ian Lance Taylor  
3247
 
3248
        * configure: Regenerate with autoconf 2.7.
3249
 
3250
Tue Jan 30 08:48:18 1996  Fred Fish  
3251
 
3252
        * interp.c (LoadMemory): Enclose text following #endif in /* */.
3253
        * support.h: Remove superfluous "1" from #if.
3254
        * support.h (CHECKSIM): Remove stray 'a' at end of line.
3255
 
3256
Mon Dec  4 11:44:40 1995  Jamie Smith  
3257
 
3258
        * interp.c (StoreFPR): Control UndefinedResult() call on
3259
        WARN_RESULT manifest.
3260
 
3261
Fri Dec  1 16:37:19 1995  James G. Smith  
3262
 
3263
        * gencode.c: Tidied instruction decoding, and added FP instruction
3264
        support.
3265
 
3266
        * interp.c: Added dineroIII, and BSD profiling support. Also
3267
        run-time FP handling.
3268
 
3269
Sun Oct 22 00:57:18 1995  James G. Smith  
3270
 
3271
        * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3272
        gencode.c, interp.c, support.h: created.

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