OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [ppc/] [idecode_branch.h] - Blame information for rev 841

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
/*  This file is part of the program psim.
2
 
3
    Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
4
 
5
    This program is free software; you can redistribute it and/or modify
6
    it under the terms of the GNU General Public License as published by
7
    the Free Software Foundation; either version 2 of the License, or
8
    (at your option) any later version.
9
 
10
    This program is distributed in the hope that it will be useful,
11
    but WITHOUT ANY WARRANTY; without even the implied warranty of
12
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
    GNU General Public License for more details.
14
 
15
    You should have received a copy of the GNU General Public License
16
    along with this program; if not, write to the Free Software
17
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18
 
19
    */
20
 
21
 
22
/* branch macro's:
23
 
24
   The macro's below implement the semantics of the PowerPC jump
25
   instructions. */
26
 
27
 
28
/* If so required, update the Link Register with the next sequential
29
   instruction address */
30
 
31
#define UPDATE_LK \
32
do { \
33
  if (update_LK) { \
34
    ppc_ia target = cia + 4; \
35
    ppc_spr new_address = (ppc_spr)IEA_MASKED(ppc_is_64bit(processor), \
36
                                              target); \
37
    LR = new_address; \
38
  } \
39
  ITRACE(trace_branch, \
40
         ("UPDATE_LK - update_LK=%d lr=0x%x cia=0x%x\n", \
41
          update_LK, LR, cia); \
42
} while (0)
43
 
44
 
45
/* take the branch - absolute or relative - possibly updating the link
46
   register */
47
 
48
#define BRANCH(ADDRESS) \
49
do { \
50
  UPDATE_LK; \
51
  if (update_AA) { \
52
    ppc_ia target = (ppc_ia)(ADDRESS); \
53
    nia = (ppc_ia)IEA_MASKED(ppc_is_64bit(processor), target); \
54
  } \
55
  else { \
56
    ppc_ia target = cia + ADDRESS; \
57
    nia = (ppc_ia)IEA_MASKED(ppc_is_64bit(processor), target); \
58
  } \
59
  PTRACE(trace_branch, \
60
         ("BRANCH - update_AA=%d update_LK=%d nia=0x%x cia=0x%x\n", \
61
          update_AA, update_LK, nia, cia); \
62
} while (0)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.