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[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [d10v-elf/] [t-rte.s] - Blame information for rev 866

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.include "t-macros.i"
 
        start
 
        PSW_BITS = PSW_C|PSW_F0|PSW_F1
 
        ldi     r6, #success@word
        mvtc    r6, bpc
        ldi     r6, #PSW_BITS
        mvtc    r6, bpsw
 
test_rte:
        RTE
        exit47
 
success:
        checkpsw2 1 PSW_BITS
        exit0

Line No.	Rev	Author	Line
1	330	jeremybenn	`.include "t-macros.i"`
2
3			`start`
4
5			`PSW_BITS = PSW_C\|PSW_F0\|PSW_F1`
6
7			`ldi r6, #success@word`
8			`mvtc r6, bpc`
9			`ldi r6, #PSW_BITS`
10			`mvtc r6, bpsw`
11
12			`test_rte:`
13			`RTE`
14			`exit47`
15
16			`success:`
17			`checkpsw2 1 PSW_BITS`
18			`exit0`

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[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [d10v-elf/] [t-rte.s] - Blame information for rev 866