OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [frv/] [bchilr.cgs] - Blame information for rev 841

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
# frv testcase for bchilr $ICCi,$ccond,$hint
2
# mach: all
3
 
4
        .include "testutils.inc"
5
 
6
        start
7
 
8
        .global bchilr
9
bchilr:
10
        ; ccond is true
11
        set_spr_immed   128,lcr
12
        set_spr_addr    ok1,lr
13
        set_icc         0x0 0
14
        bchilr          icc0,0,0
15
        fail
16
ok1:
17
        set_spr_addr    bad,lr
18
        set_icc         0x1 1
19
        bchilr          icc1,0,1
20
 
21
        set_spr_addr    ok3,lr
22
        set_icc         0x2 2
23
        bchilr          icc2,0,2
24
        fail
25
ok3:
26
        set_spr_addr    bad,lr
27
        set_icc         0x3 3
28
        bchilr          icc3,0,3
29
 
30
        set_spr_addr    bad,lr
31
        set_icc         0x4 0
32
        bchilr          icc0,0,0
33
 
34
        set_spr_addr    bad,lr
35
        set_icc         0x5 1
36
        bchilr          icc1,0,1
37
 
38
        set_spr_addr    bad,lr
39
        set_icc         0x6 2
40
        bchilr          icc2,0,2
41
 
42
        set_spr_addr    bad,lr
43
        set_icc         0x7 3
44
        bchilr          icc3,0,3
45
 
46
        set_spr_addr    ok9,lr
47
        set_icc         0x8 0
48
        bchilr          icc0,0,0
49
        fail
50
ok9:
51
        set_spr_addr    bad,lr
52
        set_icc         0x9 1
53
        bchilr          icc1,0,1
54
 
55
        set_spr_addr    okb,lr
56
        set_icc         0xa 2
57
        bchilr          icc2,0,2
58
        fail
59
okb:
60
        set_spr_addr    bad,lr
61
        set_icc         0xb 3
62
        bchilr          icc3,0,3
63
 
64
        set_spr_addr    bad,lr
65
        set_icc         0xc 0
66
        bchilr          icc0,0,0
67
 
68
        set_spr_addr    bad,lr
69
        set_icc         0xd 1
70
        bchilr          icc1,0,1
71
 
72
        set_spr_addr    bad,lr
73
        set_icc         0xe 2
74
        bchilr          icc2,0,2
75
 
76
        set_spr_addr    bad,lr
77
        set_icc         0xf 3
78
        bchilr          icc3,0,3
79
 
80
        ; ccond is true
81
        set_spr_immed   1,lcr
82
        set_spr_addr    okh,lr
83
        set_icc         0x0 0
84
        bchilr          icc0,1,0
85
        fail
86
okh:
87
        set_spr_immed   1,lcr
88
        set_spr_addr    bad,lr
89
        set_icc         0x1 1
90
        bchilr          icc1,1,1
91
 
92
        set_spr_immed   1,lcr
93
        set_spr_addr    okj,lr
94
        set_icc         0x2 2
95
        bchilr          icc2,1,2
96
        fail
97
okj:
98
        set_spr_immed   1,lcr
99
        set_spr_addr    bad,lr
100
        set_icc         0x3 3
101
        bchilr          icc3,1,3
102
 
103
        set_spr_immed   1,lcr
104
        set_spr_addr    bad,lr
105
        set_icc         0x4 0
106
        bchilr          icc0,1,0
107
 
108
        set_spr_immed   1,lcr
109
        set_spr_addr    bad,lr
110
        set_icc         0x5 1
111
        bchilr          icc1,1,1
112
 
113
        set_spr_immed   1,lcr
114
        set_spr_addr    bad,lr
115
        set_icc         0x6 2
116
        bchilr          icc2,1,2
117
 
118
        set_spr_immed   1,lcr
119
        set_spr_addr    bad,lr
120
        set_icc         0x7 3
121
        bchilr          icc3,1,3
122
 
123
        set_spr_immed   1,lcr
124
        set_spr_addr    okp,lr
125
        set_icc         0x8 0
126
        bchilr          icc0,1,0
127
        fail
128
okp:
129
        set_spr_immed   1,lcr
130
        set_spr_addr    bad,lr
131
        set_icc         0x9 1
132
        bchilr          icc1,1,1
133
 
134
        set_spr_immed   1,lcr
135
        set_spr_addr    okr,lr
136
        set_icc         0xa 2
137
        bchilr          icc2,1,2
138
        fail
139
okr:
140
        set_spr_immed   1,lcr
141
        set_spr_addr    bad,lr
142
        set_icc         0xb 3
143
        bchilr          icc3,1,3
144
 
145
        set_spr_immed   1,lcr
146
        set_spr_addr    bad,lr
147
        set_icc         0xc 0
148
        bchilr          icc0,1,0
149
 
150
        set_spr_immed   1,lcr
151
        set_spr_addr    bad,lr
152
        set_icc         0xd 1
153
        bchilr          icc1,1,1
154
 
155
        set_spr_immed   1,lcr
156
        set_spr_addr    bad,lr
157
        set_icc         0xe 2
158
        bchilr          icc2,1,2
159
 
160
        set_spr_immed   1,lcr
161
        set_spr_addr    bad,lr
162
        set_icc         0xf 3
163
        bchilr          icc3,1,3
164
 
165
        ; ccond is false
166
        set_spr_immed   128,lcr
167
        set_spr_addr    bad,lr
168
        set_icc         0x0 0
169
        bchilr          icc0,1,0
170
 
171
        set_icc         0x1 1
172
        bchilr          icc1,1,1
173
 
174
        set_icc         0x2 2
175
        bchilr          icc2,1,2
176
 
177
        set_icc         0x3 3
178
        bchilr          icc3,1,3
179
 
180
        set_icc         0x4 0
181
        bchilr          icc0,1,0
182
 
183
        set_icc         0x5 1
184
        bchilr          icc1,1,1
185
 
186
        set_icc         0x6 2
187
        bchilr          icc2,1,2
188
 
189
        set_icc         0x7 3
190
        bchilr          icc3,1,3
191
 
192
        set_icc         0x8 0
193
        bchilr          icc0,1,0
194
 
195
        set_icc         0x9 1
196
        bchilr          icc1,1,1
197
 
198
        set_icc         0xa 2
199
        bchilr          icc2,1,2
200
 
201
        set_icc         0xb 3
202
        bchilr          icc3,1,3
203
 
204
        set_icc         0xc 0
205
        bchilr          icc0,1,0
206
 
207
        set_icc         0xd 1
208
        bchilr          icc1,1,1
209
 
210
        set_icc         0xe 2
211
        bchilr          icc2,1,2
212
 
213
        set_icc         0xf 3
214
        bchilr          icc3,1,3
215
 
216
        ; ccond is false
217
        set_spr_immed   1,lcr
218
        set_spr_addr    bad,lr
219
        set_icc         0x0 0
220
        bchilr          icc0,0,0
221
 
222
        set_spr_immed   1,lcr
223
        set_icc         0x1 1
224
        bchilr          icc1,0,1
225
 
226
        set_spr_immed   1,lcr
227
        set_icc         0x2 2
228
        bchilr          icc2,0,2
229
 
230
        set_spr_immed   1,lcr
231
        set_icc         0x3 3
232
        bchilr          icc3,0,3
233
 
234
        set_spr_immed   1,lcr
235
        set_icc         0x4 0
236
        bchilr          icc0,0,0
237
 
238
        set_spr_immed   1,lcr
239
        set_icc         0x5 1
240
        bchilr          icc1,0,1
241
 
242
        set_spr_immed   1,lcr
243
        set_icc         0x6 2
244
        bchilr          icc2,0,2
245
 
246
        set_spr_immed   1,lcr
247
        set_icc         0x7 3
248
        bchilr          icc3,0,3
249
 
250
        set_spr_immed   1,lcr
251
        set_icc         0x8 0
252
        bchilr          icc0,0,0
253
 
254
        set_spr_immed   1,lcr
255
        set_icc         0x9 1
256
        bchilr          icc1,0,1
257
 
258
        set_spr_immed   1,lcr
259
        set_icc         0xa 2
260
        bchilr          icc2,0,2
261
 
262
        set_spr_immed   1,lcr
263
        set_icc         0xb 3
264
        bchilr          icc3,0,3
265
 
266
        set_spr_immed   1,lcr
267
        set_icc         0xc 0
268
        bchilr          icc0,0,0
269
 
270
        set_spr_immed   1,lcr
271
        set_icc         0xd 1
272
        bchilr          icc1,0,1
273
 
274
        set_spr_immed   1,lcr
275
        set_icc         0xe 2
276
        bchilr          icc2,0,2
277
 
278
        set_spr_immed   1,lcr
279
        set_icc         0xf 3
280
        bchilr          icc3,0,3
281
 
282
        pass
283
bad:
284
        fail

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.