URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [sh/] [bset.s] - Blame information for rev 855

Go to most recent revision | Details | Compare with Previous | View Log


# sh testcase for bset
# mach:  all
# as(sh):       -defsym sim_cpu=0
# as(shdsp):    -defsym sim_cpu=1 -dsp
 
        .include "testutils.inc"
 
        .align 2
_x:     .long   0
_y:     .long   0x55555555
 
        start
 
bset_b_imm_disp12_reg:
        set_grs_a5a5
        mov.l   x, r1
 
        bset.b  #0, @(3, r1)
        assertmem _x, 0x1
        bset.b  #1, @(3, r1)
        assertmem _x, 0x3
        bset.b  #2, @(3, r1)
        assertmem _x, 0x7
        bset.b  #3, @(3, r1)
        assertmem _x, 0xf
 
        bset.b  #4, @(3, r1)
        assertmem _x, 0x1f
        bset.b  #5, @(3, r1)
        assertmem _x, 0x3f
        bset.b  #6, @(3, r1)
        assertmem _x, 0x7f
        bset.b  #7, @(3, r1)
        assertmem _x, 0xff
 
        bset.b  #0, @(2, r1)
        assertmem _x, 0x1ff
        bset.b  #1, @(2, r1)
        assertmem _x, 0x3ff
        bset.b  #2, @(2, r1)
        assertmem _x, 0x7ff
        bset.b  #3, @(2, r1)
        assertmem _x, 0xfff
 
        bra     .L2
        nop
 
        .align 2
x:      .long   _x
y:      .long   _y
 
.L2:
        bset.b  #4, @(2, r1)
        assertmem _x, 0x1fff
        bset.b  #5, @(2, r1)
        assertmem _x, 0x3fff
        bset.b  #6, @(2, r1)
        assertmem _x, 0x7fff
        bset.b  #7, @(2, r1)
        assertmem _x, 0xffff
 
        bset.b  #0, @(1, r1)
        assertmem _x, 0x1ffff
        bset.b  #1, @(1, r1)
        assertmem _x, 0x3ffff
        bset.b  #2, @(1, r1)
        assertmem _x, 0x7ffff
        bset.b  #3, @(1, r1)
        assertmem _x, 0xfffff
 
        bset.b  #4, @(1, r1)
        assertmem _x, 0x1fffff
        bset.b  #5, @(1, r1)
        assertmem _x, 0x3fffff
        bset.b  #6, @(1, r1)
        assertmem _x, 0x7fffff
        bset.b  #7, @(1, r1)
        assertmem _x, 0xffffff
 
        bset.b  #0, @(0, r1)
        assertmem _x, 0x1ffffff
        bset.b  #1, @(0, r1)
        assertmem _x, 0x3ffffff
        bset.b  #2, @(0, r1)
        assertmem _x, 0x7ffffff
        bset.b  #3, @(0, r1)
        assertmem _x, 0xfffffff
 
        bset.b  #4, @(0, r1)
        assertmem _x, 0x1fffffff
        bset.b  #5, @(0, r1)
        assertmem _x, 0x3fffffff
        bset.b  #6, @(0, r1)
        assertmem _x, 0x7fffffff
        bset.b  #7, @(0, r1)
        assertmem _x, 0xffffffff
 
        assertreg _x, r1
 
bset_imm_reg:
        set_greg 0, r1
        bset    #0, r1
        assertreg 0x1, r1
        bset    #1, r1
        assertreg 0x3, r1
        bset    #2, r1
        assertreg 0x7, r1
        bset    #3, r1
        assertreg 0xf, r1
 
        bset    #4, r1
        assertreg 0x1f, r1
        bset    #5, r1
        assertreg 0x3f, r1
        bset    #6, r1
        assertreg 0x7f, r1
        bset    #7, r1
        assertreg 0xff, r1
 
        test_gr_a5a5 r0
        test_gr_a5a5 r2
        test_gr_a5a5 r3
        test_gr_a5a5 r4
        test_gr_a5a5 r5
        test_gr_a5a5 r6
        test_gr_a5a5 r7
        test_gr_a5a5 r8
        test_gr_a5a5 r9
        test_gr_a5a5 r10
        test_gr_a5a5 r11
        test_gr_a5a5 r12
        test_gr_a5a5 r13
        test_gr_a5a5 r14
 
        pass
 
        exit 0
 
 

Line No.	Rev	Author	Line
1	330	jeremybenn	`# sh testcase for bset`
2			`# mach: all`
3			`# as(sh): -defsym sim_cpu=0`
4			`# as(shdsp): -defsym sim_cpu=1 -dsp`
5
6			`.include "testutils.inc"`
7
8			`.align 2`
9			`_x: .long 0`
10			`_y: .long 0x55555555`
11
12			`start`
13
14			`bset_b_imm_disp12_reg:`
15			`set_grs_a5a5`
16			`mov.l x, r1`
17
18			`bset.b #0, @(3, r1)`
19			`assertmem _x, 0x1`
20			`bset.b #1, @(3, r1)`
21			`assertmem _x, 0x3`
22			`bset.b #2, @(3, r1)`
23			`assertmem _x, 0x7`
24			`bset.b #3, @(3, r1)`
25			`assertmem _x, 0xf`
26
27			`bset.b #4, @(3, r1)`
28			`assertmem _x, 0x1f`
29			`bset.b #5, @(3, r1)`
30			`assertmem _x, 0x3f`
31			`bset.b #6, @(3, r1)`
32			`assertmem _x, 0x7f`
33			`bset.b #7, @(3, r1)`
34			`assertmem _x, 0xff`
35
36			`bset.b #0, @(2, r1)`
37			`assertmem _x, 0x1ff`
38			`bset.b #1, @(2, r1)`
39			`assertmem _x, 0x3ff`
40			`bset.b #2, @(2, r1)`
41			`assertmem _x, 0x7ff`
42			`bset.b #3, @(2, r1)`
43			`assertmem _x, 0xfff`
44
45			`bra .L2`
46			`nop`
47
48			`.align 2`
49			`x: .long _x`
50			`y: .long _y`
51
52			`.L2:`
53			`bset.b #4, @(2, r1)`
54			`assertmem _x, 0x1fff`
55			`bset.b #5, @(2, r1)`
56			`assertmem _x, 0x3fff`
57			`bset.b #6, @(2, r1)`
58			`assertmem _x, 0x7fff`
59			`bset.b #7, @(2, r1)`
60			`assertmem _x, 0xffff`
61
62			`bset.b #0, @(1, r1)`
63			`assertmem _x, 0x1ffff`
64			`bset.b #1, @(1, r1)`
65			`assertmem _x, 0x3ffff`
66			`bset.b #2, @(1, r1)`
67			`assertmem _x, 0x7ffff`
68			`bset.b #3, @(1, r1)`
69			`assertmem _x, 0xfffff`
70
71			`bset.b #4, @(1, r1)`
72			`assertmem _x, 0x1fffff`
73			`bset.b #5, @(1, r1)`
74			`assertmem _x, 0x3fffff`
75			`bset.b #6, @(1, r1)`
76			`assertmem _x, 0x7fffff`
77			`bset.b #7, @(1, r1)`
78			`assertmem _x, 0xffffff`
79
80			`bset.b #0, @(0, r1)`
81			`assertmem _x, 0x1ffffff`
82			`bset.b #1, @(0, r1)`
83			`assertmem _x, 0x3ffffff`
84			`bset.b #2, @(0, r1)`
85			`assertmem _x, 0x7ffffff`
86			`bset.b #3, @(0, r1)`
87			`assertmem _x, 0xfffffff`
88
89			`bset.b #4, @(0, r1)`
90			`assertmem _x, 0x1fffffff`
91			`bset.b #5, @(0, r1)`
92			`assertmem _x, 0x3fffffff`
93			`bset.b #6, @(0, r1)`
94			`assertmem _x, 0x7fffffff`
95			`bset.b #7, @(0, r1)`
96			`assertmem _x, 0xffffffff`
97
98			`assertreg _x, r1`
99
100			`bset_imm_reg:`
101			`set_greg 0, r1`
102			`bset #0, r1`
103			`assertreg 0x1, r1`
104			`bset #1, r1`
105			`assertreg 0x3, r1`
106			`bset #2, r1`
107			`assertreg 0x7, r1`
108			`bset #3, r1`
109			`assertreg 0xf, r1`
110
111			`bset #4, r1`
112			`assertreg 0x1f, r1`
113			`bset #5, r1`
114			`assertreg 0x3f, r1`
115			`bset #6, r1`
116			`assertreg 0x7f, r1`
117			`bset #7, r1`
118			`assertreg 0xff, r1`
119
120			`test_gr_a5a5 r0`
121			`test_gr_a5a5 r2`
122			`test_gr_a5a5 r3`
123			`test_gr_a5a5 r4`
124			`test_gr_a5a5 r5`
125			`test_gr_a5a5 r6`
126			`test_gr_a5a5 r7`
127			`test_gr_a5a5 r8`
128			`test_gr_a5a5 r9`
129			`test_gr_a5a5 r10`
130			`test_gr_a5a5 r11`
131			`test_gr_a5a5 r12`
132			`test_gr_a5a5 r13`
133			`test_gr_a5a5 r14`
134
135			`pass`
136
137			`exit 0`
138
139

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [sh/] [bset.s] - Blame information for rev 855