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[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [sh/] [fschg.s] - Blame information for rev 841

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Line No. Rev Author Line
1 330 jeremybenn
# sh testcase for fschg
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# mach: sh
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# as(sh):       -defsym sim_cpu=0
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        .include "testutils.inc"
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        start
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        set_grs_a5a5
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        set_fprs_a5a5
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        sts     fpscr, r0
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        assertreg0      0
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        fschg
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        sts     fpscr, r0
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        assertreg0      0x100000
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        fschg
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        sts     fpscr, r0
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        assertreg0      0
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        fschg
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        sts     fpscr, r0
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        assertreg0      0x100000
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        fschg
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        sts     fpscr, r0
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        assertreg0      0
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        set_greg 0xa5a5a5a5 r0
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        test_grs_a5a5
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        test_fprs_a5a5
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        pass
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        exit 0

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