OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [v850/] [shl.cgs] - Blame information for rev 855

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 330 jeremybenn
# v850 shl
2
# mach: all
3
 
4
        .include "testutils.inc"
5
 
6
# CY is set to 1 if the bit shifted out last is 1, else 0
7
# OV is set to zero.
8
# Z is set if the result is 0, else 0
9
 
10
        noflags
11
        seti    1, r1
12
        seti    0x00000000, r2
13
        shl     r1, r2
14
 
15
        flags   z
16
        reg     r2, 0
17
 
18
        noflags
19
        seti    1, r1
20
        seti    0x80000000, r2
21
        shl     r1, r2
22
 
23
        flags   c + z
24
        reg     r2, 0
25
 
26
        noflags
27
        seti    0x00000000, r2
28
        shl     1, r2
29
 
30
        flags   z
31
        reg     r2, 0
32
 
33
        noflags
34
        seti    0x80000000, r2
35
        shl     1, r2
36
 
37
        flags   c + z
38
        reg     r2, 0
39
 
40
# However, if the number of shifts is 0, CY is 0.
41
 
42
        noflags
43
        seti    0, r1
44
        seti    0xffffffff, r2
45
        shl     r1, r2
46
 
47
        flags   s
48
        reg     r2, 0xffffffff
49
 
50
        noflags
51
        seti    0xffffffff, r2
52
        shl     0, r2
53
 
54
        flags   s
55
        reg     r2, 0xffffffff
56
 
57
# Zero is shifted into the LSB
58
# S is 1 if the result is negative, else 0
59
 
60
        noflags
61
        seti    1, r1
62
        seti    0x4000000f, r2
63
        shl     r1, r2
64
 
65
        flags   s
66
        reg     r2, 0x8000001e
67
 
68
        noflags
69
        seti    0x4000000f, r2
70
        shl     1, r2
71
 
72
        flags   s
73
        reg     r2, 0x8000001e
74
 
75
        pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.