OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [newlib-1.18.0/] [libgloss/] [arm/] [coff-redboot.ld] - Blame information for rev 841

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 207 jeremybenn
OUTPUT_FORMAT("coff-arm-little", "coff-arm-big", "coff-arm-little")
2
 SEARCH_DIR(/toolbin/xscale-coff/lib);
3
ENTRY(_start)
4
SECTIONS
5
{
6
  /* We start at 0x8000 because gdb assumes it (see FRAME_CHAIN).
7
     This is an artifact of the ARM Demon monitor using the bottom 32k
8
     as workspace (shared with the FP instruction emulator if
9
     present): */
10
  .text  0x8000 : {
11
    *(.init)
12
    *(.text*)
13
    *(.glue_7t)
14
    *(.glue_7)
15
    *(.rdata)
16
     ___CTOR_LIST__ = .; __CTOR_LIST__ = . ;
17
                        LONG (-1); *(.ctors); *(.ctor); LONG (0);
18
     ___DTOR_LIST__ = .; __DTOR_LIST__ = . ;
19
                        LONG (-1); *(.dtors); *(.dtor);  LONG (0);
20
    *(.fini)
21
     etext  =  .;
22
     _etext  =  .;
23
  }
24
  .data 0x40000 + (. & 0xfffc0fff) : {
25
      __data_start__ = . ;
26
    *(.data*)
27
    *(.gcc_exc*)
28
    ___EH_FRAME_BEGIN__ = . ;
29
    *(.eh_fram*)
30
    ___EH_FRAME_END__ = . ;
31
    LONG(0);
32
     __data_end__ = . ;
33
     edata  =  .;
34
     _edata  =  .;
35
  }
36
  .bss  SIZEOF(.data) + ADDR(.data) :
37
  {
38
     __bss_start__ = . ;
39
    *(.bss)
40
    *(COMMON)
41
     __bss_end__ = . ;
42
  }
43
   end = .;
44
   _end = .;
45
   __end__ = .;
46
  .stab  0 (NOLOAD) :
47
  {
48
    [ .stab ]
49
  }
50
  .stabstr  0 (NOLOAD) :
51
  {
52
    [ .stabstr ]
53
  }
54
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.