OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [newlib-1.18.0/] [libgloss/] [bfin/] [include/] [cdefBF514.h] - Blame information for rev 207

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 207 jeremybenn
/*
2
 * The authors hereby grant permission to use, copy, modify, distribute,
3
 * and license this software and its documentation for any purpose, provided
4
 * that existing copyright notices are retained in all copies and that this
5
 * notice is included verbatim in any distributions. No written agreement,
6
 * license, or royalty fee is required for any of the authorized uses.
7
 * Modifications to this software may be copyrighted by their authors
8
 * and need not follow the licensing terms described here, provided that
9
 * the new terms are clearly indicated on the first page of each file where
10
 * they apply.
11
 */
12
 
13
/*
14
** Copyright (C) 2009 Analog Devices, Inc.
15
**
16
************************************************************************************
17
**
18
** This include file contains a list of macro "defines" to enable the programmer
19
** to use symbolic names for the ADSP-BF514 peripherals.
20
**
21
************************************************************************************
22
** System MMR Register Map
23
************************************************************************************/
24
 
25
#ifndef _CDEF_BF514_H
26
#define _CDEF_BF514_H
27
 
28
/* include all Core registers and bit definitions */
29
#include <defBF514.h>
30
 
31
/* include core specific register pointer definitions */
32
#include <cdef_LPBlackfin.h>
33
 
34
/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF514 */
35
 
36
/* include cdefBF51x_base.h for the set of #defines that are common to all ADSP-BF51x processors */
37
#include <cdefBF51x_base.h>
38
 
39
#ifdef _MISRA_RULES
40
#pragma diag(push)
41
#pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant")
42
#endif /* _MISRA_RULES */
43
 
44
/* The following are the #defines needed by ADSP-BF514 that are not in the common header */
45
 
46
/* SDH Registers (0xFFC03800 - 0xFFC03CFF)*/
47
#define pSDH_PWR_CTL                    ((volatile unsigned short *)SDH_PWR_CTL)
48
#define pSDH_CLK_CTL                    ((volatile unsigned short *)SDH_CLK_CTL)
49
#define pSDH_ARGUMENT                   ((volatile unsigned long  *)SDH_ARGUMENT)
50
#define pSDH_COMMAND                    ((volatile unsigned short *)SDH_COMMAND)
51
#define pSDH_RESP_CMD                   ((volatile unsigned short *)SDH_RESP_CMD)
52
#define pSDH_RESPONSE0                  ((volatile unsigned long  *)SDH_RESPONSE0)
53
#define pSDH_RESPONSE1                  ((volatile unsigned long  *)SDH_RESPONSE1)
54
#define pSDH_RESPONSE2                  ((volatile unsigned long  *)SDH_RESPONSE2)
55
#define pSDH_RESPONSE3                  ((volatile unsigned long  *)SDH_RESPONSE3)
56
#define pSDH_DATA_TIMER                 ((volatile unsigned long  *)SDH_DATA_TIMER)
57
#define pSDH_DATA_LGTH                  ((volatile unsigned short *)SDH_DATA_LGTH)
58
#define pSDH_DATA_CTL                   ((volatile unsigned short *)SDH_DATA_CTL)
59
#define pSDH_DATA_CNT                   ((volatile unsigned short *)SDH_DATA_CNT)
60
#define pSDH_STATUS                     ((volatile unsigned long  *)SDH_STATUS)
61
#define pSDH_STATUS_CLR                 ((volatile unsigned short *)SDH_STATUS_CLR)
62
#define pSDH_MASK0                      ((volatile unsigned long  *)SDH_MASK0)
63
#define pSDH_MASK1                      ((volatile unsigned long  *)SDH_MASK1)
64
#define pSDH_FIFO_CNT                   ((volatile unsigned short *)SDH_FIFO_CNT)
65
#define pSDH_FIFO                               ((volatile unsigned long  *)SDH_FIFO)
66
#define pSDH_E_STATUS                   ((volatile unsigned short *)SDH_E_STATUS)
67
#define pSDH_E_MASK                     ((volatile unsigned short *)SDH_E_MASK)
68
#define pSDH_CFG                                ((volatile unsigned short *)SDH_CFG)
69
#define pSDH_RD_WAIT_EN                 ((volatile unsigned short *)SDH_RD_WAIT_EN)
70
#define pSDH_PID0                               ((volatile unsigned short *)SDH_PID0)
71
#define pSDH_PID1                               ((volatile unsigned short *)SDH_PID1)
72
#define pSDH_PID2                               ((volatile unsigned short *)SDH_PID2)
73
#define pSDH_PID3                               ((volatile unsigned short *)SDH_PID3)
74
#define pSDH_PID4                               ((volatile unsigned short *)SDH_PID4)
75
#define pSDH_PID5                               ((volatile unsigned short *)SDH_PID5)
76
#define pSDH_PID6                               ((volatile unsigned short *)SDH_PID6)
77
#define pSDH_PID7                               ((volatile unsigned short *)SDH_PID7)
78
 
79
 
80
/* RSI Registers (0xFFC03800 - 0xFFC03CFF)*/
81
#define pRSI_PWR_CONTROL                ((volatile unsigned short *)RSI_PWR_CONTROL)
82
#define pRSI_CLK_CONTROL                ((volatile unsigned short *)RSI_CLK_CONTROL)
83
#define pRSI_ARGUMENT                   ((volatile unsigned long  *)RSI_ARGUMENT)
84
#define pRSI_COMMAND                    ((volatile unsigned short *)RSI_COMMAND)
85
#define pRSI_RESP_CMD                   ((volatile unsigned short *)RSI_RESP_CMD)
86
#define pRSI_RESPONSE0                  ((volatile unsigned long  *)RSI_RESPONSE0)
87
#define pRSI_RESPONSE1                  ((volatile unsigned long  *)RSI_RESPONSE1)
88
#define pRSI_RESPONSE2                  ((volatile unsigned long  *)RSI_RESPONSE2)
89
#define pRSI_RESPONSE3                  ((volatile unsigned long  *)RSI_RESPONSE3)
90
#define pRSI_DATA_TIMER                 ((volatile unsigned long  *)RSI_DATA_TIMER)
91
#define pRSI_DATA_LGTH                  ((volatile unsigned short *)RSI_DATA_LGTH)
92
#define pRSI_DATA_CONTROL               ((volatile unsigned short *)RSI_DATA_CONTROL)
93
#define pRSI_DATA_CNT                   ((volatile unsigned short *)RSI_DATA_CNT)
94
#define pRSI_STATUS                     ((volatile unsigned long  *)RSI_STATUS)
95
#define pRSI_STATUSCL                   ((volatile unsigned short *)RSI_STATUSCL)
96
#define pRSI_MASK0                      ((volatile unsigned long  *)RSI_MASK0)
97
#define pRSI_MASK1                      ((volatile unsigned long  *)RSI_MASK1)
98
#define pRSI_FIFO_CNT                   ((volatile unsigned short *)RSI_FIFO_CNT)
99
#define pRSI_CEATA_CONTROL              ((volatile unsigned short *)RSI_CEATA_CONTROL)
100
#define pRSI_FIFO                               ((volatile unsigned long  *)RSI_FIFO)
101
#define pRSI_ESTAT                      ((volatile unsigned short *)RSI_ESTAT)
102
#define pRSI_EMASK                      ((volatile unsigned short *)RSI_EMASK)
103
#define pRSI_CONFIG                     ((volatile unsigned short *)RSI_CONFIG)
104
#define pRSI_RD_WAIT_EN                 ((volatile unsigned short *)RSI_RD_WAIT_EN)
105
#define pRSI_PID0                               ((volatile unsigned short *)RSI_PID0)
106
#define pRSI_PID1                               ((volatile unsigned short *)RSI_PID1)
107
#define pRSI_PID2                               ((volatile unsigned short *)RSI_PID2)
108
#define pRSI_PID3                               ((volatile unsigned short *)RSI_PID3)
109
 
110
#ifdef _MISRA_RULES
111
#pragma diag(pop)
112
#endif /* _MISRA_RULES */
113
 
114
#endif /* _CDEF_BF514_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.