1 |
207 |
jeremybenn |
/*
|
2 |
|
|
* The authors hereby grant permission to use, copy, modify, distribute,
|
3 |
|
|
* and license this software and its documentation for any purpose, provided
|
4 |
|
|
* that existing copyright notices are retained in all copies and that this
|
5 |
|
|
* notice is included verbatim in any distributions. No written agreement,
|
6 |
|
|
* license, or royalty fee is required for any of the authorized uses.
|
7 |
|
|
* Modifications to this software may be copyrighted by their authors
|
8 |
|
|
* and need not follow the licensing terms described here, provided that
|
9 |
|
|
* the new terms are clearly indicated on the first page of each file where
|
10 |
|
|
* they apply.
|
11 |
|
|
*/
|
12 |
|
|
|
13 |
|
|
/************************************************************************
|
14 |
|
|
*
|
15 |
|
|
* cdefBF532.h
|
16 |
|
|
*
|
17 |
|
|
* Copyright (C) 2008, 2009 Analog Devices, Inc.
|
18 |
|
|
*
|
19 |
|
|
************************************************************************/
|
20 |
|
|
|
21 |
|
|
#ifndef _CDEF_BF532_H
|
22 |
|
|
#define _CDEF_BF532_H
|
23 |
|
|
|
24 |
|
|
#if !defined(__ADSPLPBLACKFIN__)
|
25 |
|
|
#warning cdefBF532.h should only be included for 532 compatible chips.
|
26 |
|
|
#endif
|
27 |
|
|
/* include all Core registers and bit definitions */
|
28 |
|
|
#include <defBF532.h>
|
29 |
|
|
|
30 |
|
|
/* include core specific register pointer definitions */
|
31 |
|
|
#include <cdef_LPBlackfin.h>
|
32 |
|
|
|
33 |
|
|
/* include built-in mneumonic macros */
|
34 |
|
|
#include <ccblkfn.h>
|
35 |
|
|
|
36 |
|
|
#ifndef _PTR_TO_VOL_VOID_PTR
|
37 |
|
|
#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
|
38 |
|
|
#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
|
39 |
|
|
#else
|
40 |
|
|
#define _PTR_TO_VOL_VOID_PTR (volatile void **)
|
41 |
|
|
#endif
|
42 |
|
|
#endif
|
43 |
|
|
|
44 |
|
|
/* Clock/Regulator Control */
|
45 |
|
|
#define pPLL_CTL ((volatile unsigned short *)PLL_CTL)
|
46 |
|
|
#define pPLL_DIV ((volatile unsigned short *)PLL_DIV)
|
47 |
|
|
#define pVR_CTL ((volatile unsigned short *)VR_CTL)
|
48 |
|
|
#define pPLL_STAT ((volatile unsigned short *)PLL_STAT)
|
49 |
|
|
#define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT)
|
50 |
|
|
#define pCHIPID ((volatile unsigned long *)CHIPID)
|
51 |
|
|
|
52 |
|
|
|
53 |
|
|
/* System Interrupt Controller */
|
54 |
|
|
#define pSWRST ((volatile unsigned short *)SWRST)
|
55 |
|
|
#define pSYSCR ((volatile unsigned short *)SYSCR)
|
56 |
|
|
#define pSIC_IMASK ((volatile unsigned long *)SIC_IMASK)
|
57 |
|
|
#define pSIC_IAR0 ((volatile unsigned long *)SIC_IAR0)
|
58 |
|
|
#define pSIC_IAR1 ((volatile unsigned long *)SIC_IAR1)
|
59 |
|
|
#define pSIC_IAR2 ((volatile unsigned long *)SIC_IAR2)
|
60 |
|
|
#define pSIC_ISR ((volatile unsigned long *)SIC_ISR)
|
61 |
|
|
#define pSIC_IWR ((volatile unsigned long *)SIC_IWR)
|
62 |
|
|
|
63 |
|
|
|
64 |
|
|
/* Watchdog Timer */
|
65 |
|
|
#define pWDOG_CTL ((volatile unsigned short *)WDOG_CTL)
|
66 |
|
|
#define pWDOG_CNT ((volatile unsigned long *)WDOG_CNT)
|
67 |
|
|
#define pWDOG_STAT ((volatile unsigned long *)WDOG_STAT)
|
68 |
|
|
|
69 |
|
|
|
70 |
|
|
/* Real Time Clock */
|
71 |
|
|
#define pRTC_STAT ((volatile unsigned long *)RTC_STAT)
|
72 |
|
|
#define pRTC_ICTL ((volatile unsigned short *)RTC_ICTL)
|
73 |
|
|
#define pRTC_ISTAT ((volatile unsigned short *)RTC_ISTAT)
|
74 |
|
|
#define pRTC_SWCNT ((volatile unsigned short *)RTC_SWCNT)
|
75 |
|
|
#define pRTC_ALARM ((volatile unsigned long *)RTC_ALARM)
|
76 |
|
|
#define pRTC_FAST ((volatile unsigned short *)RTC_FAST)
|
77 |
|
|
#define pRTC_PREN ((volatile unsigned short *)RTC_PREN)
|
78 |
|
|
|
79 |
|
|
|
80 |
|
|
/* UART Controller */
|
81 |
|
|
#define pUART_THR ((volatile unsigned short *)UART_THR)
|
82 |
|
|
#define pUART_RBR ((volatile unsigned short *)UART_RBR)
|
83 |
|
|
#define pUART_DLL ((volatile unsigned short *)UART_DLL)
|
84 |
|
|
#define pUART_IER ((volatile unsigned short *)UART_IER)
|
85 |
|
|
#define pUART_DLH ((volatile unsigned short *)UART_DLH)
|
86 |
|
|
#define pUART_IIR ((volatile unsigned short *)UART_IIR)
|
87 |
|
|
#define pUART_LCR ((volatile unsigned short *)UART_LCR)
|
88 |
|
|
#define pUART_MCR ((volatile unsigned short *)UART_MCR)
|
89 |
|
|
#define pUART_LSR ((volatile unsigned short *)UART_LSR)
|
90 |
|
|
/* #define UART_MSR */
|
91 |
|
|
#define pUART_SCR ((volatile unsigned short *)UART_SCR)
|
92 |
|
|
#define pUART_GCTL ((volatile unsigned short *)UART_GCTL)
|
93 |
|
|
|
94 |
|
|
|
95 |
|
|
/* SPI Controller */
|
96 |
|
|
#define pSPI_CTL ((volatile unsigned short *)SPI_CTL)
|
97 |
|
|
#define pSPI_FLG ((volatile unsigned short *)SPI_FLG)
|
98 |
|
|
#define pSPI_STAT ((volatile unsigned short *)SPI_STAT)
|
99 |
|
|
#define pSPI_TDBR ((volatile unsigned short *)SPI_TDBR)
|
100 |
|
|
#define pSPI_RDBR ((volatile unsigned short *)SPI_RDBR)
|
101 |
|
|
#define pSPI_BAUD ((volatile unsigned short *)SPI_BAUD)
|
102 |
|
|
#define pSPI_SHADOW ((volatile unsigned short *)SPI_SHADOW)
|
103 |
|
|
|
104 |
|
|
|
105 |
|
|
/* TIMER 0, 1, 2 Registers */
|
106 |
|
|
#define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG)
|
107 |
|
|
#define pTIMER0_COUNTER ((volatile unsigned long *)TIMER0_COUNTER)
|
108 |
|
|
#define pTIMER0_PERIOD ((volatile unsigned long *)TIMER0_PERIOD)
|
109 |
|
|
#define pTIMER0_WIDTH ((volatile unsigned long *)TIMER0_WIDTH)
|
110 |
|
|
|
111 |
|
|
#define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG)
|
112 |
|
|
#define pTIMER1_COUNTER ((volatile unsigned long *)TIMER1_COUNTER)
|
113 |
|
|
#define pTIMER1_PERIOD ((volatile unsigned long *)TIMER1_PERIOD)
|
114 |
|
|
#define pTIMER1_WIDTH ((volatile unsigned long *)TIMER1_WIDTH)
|
115 |
|
|
|
116 |
|
|
#define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG)
|
117 |
|
|
#define pTIMER2_COUNTER ((volatile unsigned long *)TIMER2_COUNTER)
|
118 |
|
|
#define pTIMER2_PERIOD ((volatile unsigned long *)TIMER2_PERIOD)
|
119 |
|
|
#define pTIMER2_WIDTH ((volatile unsigned long *)TIMER2_WIDTH)
|
120 |
|
|
|
121 |
|
|
#define pTIMER_ENABLE ((volatile unsigned short *)TIMER_ENABLE)
|
122 |
|
|
#define pTIMER_DISABLE ((volatile unsigned short *)TIMER_DISABLE)
|
123 |
|
|
#define pTIMER_STATUS ((volatile unsigned short *)TIMER_STATUS)
|
124 |
|
|
|
125 |
|
|
|
126 |
|
|
/* General Purpose IO */
|
127 |
|
|
#define pFIO_FLAG_D ((volatile unsigned short *)FIO_FLAG_D)
|
128 |
|
|
#define pFIO_FLAG_C ((volatile unsigned short *)FIO_FLAG_C)
|
129 |
|
|
#define pFIO_FLAG_S ((volatile unsigned short *)FIO_FLAG_S)
|
130 |
|
|
#define pFIO_FLAG_T ((volatile unsigned short *)FIO_FLAG_T)
|
131 |
|
|
#define pFIO_MASKA_D ((volatile unsigned short *)FIO_MASKA_D)
|
132 |
|
|
#define pFIO_MASKA_C ((volatile unsigned short *)FIO_MASKA_C)
|
133 |
|
|
#define pFIO_MASKA_S ((volatile unsigned short *)FIO_MASKA_S)
|
134 |
|
|
#define pFIO_MASKA_T ((volatile unsigned short *)FIO_MASKA_T)
|
135 |
|
|
#define pFIO_MASKB_D ((volatile unsigned short *)FIO_MASKB_D)
|
136 |
|
|
#define pFIO_MASKB_C ((volatile unsigned short *)FIO_MASKB_C)
|
137 |
|
|
#define pFIO_MASKB_S ((volatile unsigned short *)FIO_MASKB_S)
|
138 |
|
|
#define pFIO_MASKB_T ((volatile unsigned short *)FIO_MASKB_T)
|
139 |
|
|
#define pFIO_DIR ((volatile unsigned short *)FIO_DIR)
|
140 |
|
|
#define pFIO_POLAR ((volatile unsigned short *)FIO_POLAR)
|
141 |
|
|
#define pFIO_EDGE ((volatile unsigned short *)FIO_EDGE)
|
142 |
|
|
#define pFIO_BOTH ((volatile unsigned short *)FIO_BOTH)
|
143 |
|
|
#define pFIO_INEN ((volatile unsigned short *)FIO_INEN)
|
144 |
|
|
|
145 |
|
|
|
146 |
|
|
/* SPORT0 Controller */
|
147 |
|
|
#define pSPORT0_TCR1 ((volatile unsigned short *)SPORT0_TCR1)
|
148 |
|
|
#define pSPORT0_TCR2 ((volatile unsigned short *)SPORT0_TCR2)
|
149 |
|
|
#define pSPORT0_TCLKDIV ((volatile unsigned short *)SPORT0_TCLKDIV)
|
150 |
|
|
#define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV)
|
151 |
|
|
#define pSPORT0_TX ((volatile long *)SPORT0_TX)
|
152 |
|
|
#define pSPORT0_RX ((volatile long *)SPORT0_RX)
|
153 |
|
|
#define pSPORT0_TX32 ((volatile long *)SPORT0_TX)
|
154 |
|
|
#define pSPORT0_RX32 ((volatile long *)SPORT0_RX)
|
155 |
|
|
#define pSPORT0_TX16 ((volatile unsigned short *)SPORT0_TX)
|
156 |
|
|
#define pSPORT0_RX16 ((volatile unsigned short *)SPORT0_RX)
|
157 |
|
|
#define pSPORT0_RCR1 ((volatile unsigned short *)SPORT0_RCR1)
|
158 |
|
|
#define pSPORT0_RCR2 ((volatile unsigned short *)SPORT0_RCR2)
|
159 |
|
|
#define pSPORT0_RCLKDIV ((volatile unsigned short *)SPORT0_RCLKDIV)
|
160 |
|
|
#define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV)
|
161 |
|
|
#define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT)
|
162 |
|
|
#define pSPORT0_CHNL ((volatile unsigned short *)SPORT0_CHNL)
|
163 |
|
|
#define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1)
|
164 |
|
|
#define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2)
|
165 |
|
|
#define pSPORT0_MTCS0 ((volatile unsigned long *)SPORT0_MTCS0)
|
166 |
|
|
#define pSPORT0_MTCS1 ((volatile unsigned long *)SPORT0_MTCS1)
|
167 |
|
|
#define pSPORT0_MTCS2 ((volatile unsigned long *)SPORT0_MTCS2)
|
168 |
|
|
#define pSPORT0_MTCS3 ((volatile unsigned long *)SPORT0_MTCS3)
|
169 |
|
|
#define pSPORT0_MRCS0 ((volatile unsigned long *)SPORT0_MRCS0)
|
170 |
|
|
#define pSPORT0_MRCS1 ((volatile unsigned long *)SPORT0_MRCS1)
|
171 |
|
|
#define pSPORT0_MRCS2 ((volatile unsigned long *)SPORT0_MRCS2)
|
172 |
|
|
#define pSPORT0_MRCS3 ((volatile unsigned long *)SPORT0_MRCS3)
|
173 |
|
|
|
174 |
|
|
|
175 |
|
|
/* SPORT1 Controller */
|
176 |
|
|
#define pSPORT1_TCR1 ((volatile unsigned short *)SPORT1_TCR1)
|
177 |
|
|
#define pSPORT1_TCR2 ((volatile unsigned short *)SPORT1_TCR2)
|
178 |
|
|
#define pSPORT1_TCLKDIV ((volatile unsigned short *)SPORT1_TCLKDIV)
|
179 |
|
|
#define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV)
|
180 |
|
|
#define pSPORT1_TX ((volatile long *)SPORT1_TX)
|
181 |
|
|
#define pSPORT1_RX ((volatile long *)SPORT1_RX)
|
182 |
|
|
#define pSPORT1_TX32 ((volatile long *)SPORT1_TX)
|
183 |
|
|
#define pSPORT1_RX32 ((volatile long *)SPORT1_RX)
|
184 |
|
|
#define pSPORT1_TX16 ((volatile unsigned short *)SPORT1_TX)
|
185 |
|
|
#define pSPORT1_RX16 ((volatile unsigned short *)SPORT1_RX)
|
186 |
|
|
#define pSPORT1_RCR1 ((volatile unsigned short *)SPORT1_RCR1)
|
187 |
|
|
#define pSPORT1_RCR2 ((volatile unsigned short *)SPORT1_RCR2)
|
188 |
|
|
#define pSPORT1_RCLKDIV ((volatile unsigned short *)SPORT1_RCLKDIV)
|
189 |
|
|
#define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV)
|
190 |
|
|
#define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT)
|
191 |
|
|
#define pSPORT1_CHNL ((volatile unsigned short *)SPORT1_CHNL)
|
192 |
|
|
#define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1)
|
193 |
|
|
#define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2)
|
194 |
|
|
#define pSPORT1_MTCS0 ((volatile unsigned long *)SPORT1_MTCS0)
|
195 |
|
|
#define pSPORT1_MTCS1 ((volatile unsigned long *)SPORT1_MTCS1)
|
196 |
|
|
#define pSPORT1_MTCS2 ((volatile unsigned long *)SPORT1_MTCS2)
|
197 |
|
|
#define pSPORT1_MTCS3 ((volatile unsigned long *)SPORT1_MTCS3)
|
198 |
|
|
#define pSPORT1_MRCS0 ((volatile unsigned long *)SPORT1_MRCS0)
|
199 |
|
|
#define pSPORT1_MRCS1 ((volatile unsigned long *)SPORT1_MRCS1)
|
200 |
|
|
#define pSPORT1_MRCS2 ((volatile unsigned long *)SPORT1_MRCS2)
|
201 |
|
|
#define pSPORT1_MRCS3 ((volatile unsigned long *)SPORT1_MRCS3)
|
202 |
|
|
|
203 |
|
|
|
204 |
|
|
/* External Bus Interface Unit */
|
205 |
|
|
/* Aysnchronous Memory Controller */
|
206 |
|
|
#define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL)
|
207 |
|
|
#define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0)
|
208 |
|
|
#define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1)
|
209 |
|
|
|
210 |
|
|
/* SDRAM Controller */
|
211 |
|
|
#define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL)
|
212 |
|
|
#define pEBIU_SDBCTL ((volatile unsigned short *)EBIU_SDBCTL)
|
213 |
|
|
#define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC)
|
214 |
|
|
#define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT)
|
215 |
|
|
|
216 |
|
|
|
217 |
|
|
/* DMA Traffic controls */
|
218 |
|
|
#define pDMA_TC_PER ((volatile unsigned short *)DMA_TC_PER)
|
219 |
|
|
#define pDMA_TC_CNT ((volatile unsigned short *)DMA_TC_CNT)
|
220 |
|
|
|
221 |
|
|
/* Alternate deprecated register names (below) provided for backwards code compatibility */
|
222 |
|
|
#define pDMA_TCPER ((volatile unsigned short *)DMA_TCPER)
|
223 |
|
|
#define pDMA_TCCNT ((volatile unsigned short *)DMA_TCCNT)
|
224 |
|
|
|
225 |
|
|
|
226 |
|
|
/* DMA Controller */
|
227 |
|
|
#define pDMA0_CONFIG ((volatile unsigned short *)DMA0_CONFIG)
|
228 |
|
|
#define pDMA0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_NEXT_DESC_PTR)
|
229 |
|
|
#define pDMA0_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA0_START_ADDR)
|
230 |
|
|
#define pDMA0_X_COUNT ((volatile unsigned short *)DMA0_X_COUNT)
|
231 |
|
|
#define pDMA0_Y_COUNT ((volatile unsigned short *)DMA0_Y_COUNT)
|
232 |
|
|
#define pDMA0_X_MODIFY ((volatile signed short *)DMA0_X_MODIFY)
|
233 |
|
|
#define pDMA0_Y_MODIFY ((volatile signed short *)DMA0_Y_MODIFY)
|
234 |
|
|
#define pDMA0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_CURR_DESC_PTR)
|
235 |
|
|
#define pDMA0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA0_CURR_ADDR)
|
236 |
|
|
#define pDMA0_CURR_X_COUNT ((volatile unsigned short *)DMA0_CURR_X_COUNT)
|
237 |
|
|
#define pDMA0_CURR_Y_COUNT ((volatile unsigned short *)DMA0_CURR_Y_COUNT)
|
238 |
|
|
#define pDMA0_IRQ_STATUS ((volatile unsigned short *)DMA0_IRQ_STATUS)
|
239 |
|
|
#define pDMA0_PERIPHERAL_MAP ((volatile unsigned short *)DMA0_PERIPHERAL_MAP)
|
240 |
|
|
|
241 |
|
|
#define pDMA1_CONFIG ((volatile unsigned short *)DMA1_CONFIG)
|
242 |
|
|
#define pDMA1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_NEXT_DESC_PTR)
|
243 |
|
|
#define pDMA1_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_START_ADDR)
|
244 |
|
|
#define pDMA1_X_COUNT ((volatile unsigned short *)DMA1_X_COUNT)
|
245 |
|
|
#define pDMA1_Y_COUNT ((volatile unsigned short *)DMA1_Y_COUNT)
|
246 |
|
|
#define pDMA1_X_MODIFY ((volatile signed short *)DMA1_X_MODIFY)
|
247 |
|
|
#define pDMA1_Y_MODIFY ((volatile signed short *)DMA1_Y_MODIFY)
|
248 |
|
|
#define pDMA1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_CURR_DESC_PTR)
|
249 |
|
|
#define pDMA1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_CURR_ADDR)
|
250 |
|
|
#define pDMA1_CURR_X_COUNT ((volatile unsigned short *)DMA1_CURR_X_COUNT)
|
251 |
|
|
#define pDMA1_CURR_Y_COUNT ((volatile unsigned short *)DMA1_CURR_Y_COUNT)
|
252 |
|
|
#define pDMA1_IRQ_STATUS ((volatile unsigned short *)DMA1_IRQ_STATUS)
|
253 |
|
|
#define pDMA1_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_PERIPHERAL_MAP)
|
254 |
|
|
|
255 |
|
|
#define pDMA2_CONFIG ((volatile unsigned short *)DMA2_CONFIG)
|
256 |
|
|
#define pDMA2_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_NEXT_DESC_PTR)
|
257 |
|
|
#define pDMA2_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_START_ADDR)
|
258 |
|
|
#define pDMA2_X_COUNT ((volatile unsigned short *)DMA2_X_COUNT)
|
259 |
|
|
#define pDMA2_Y_COUNT ((volatile unsigned short *)DMA2_Y_COUNT)
|
260 |
|
|
#define pDMA2_X_MODIFY ((volatile signed short *)DMA2_X_MODIFY)
|
261 |
|
|
#define pDMA2_Y_MODIFY ((volatile signed short *)DMA2_Y_MODIFY)
|
262 |
|
|
#define pDMA2_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_CURR_DESC_PTR)
|
263 |
|
|
#define pDMA2_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_CURR_ADDR)
|
264 |
|
|
#define pDMA2_CURR_X_COUNT ((volatile unsigned short *)DMA2_CURR_X_COUNT)
|
265 |
|
|
#define pDMA2_CURR_Y_COUNT ((volatile unsigned short *)DMA2_CURR_Y_COUNT)
|
266 |
|
|
#define pDMA2_IRQ_STATUS ((volatile unsigned short *)DMA2_IRQ_STATUS)
|
267 |
|
|
#define pDMA2_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_PERIPHERAL_MAP)
|
268 |
|
|
|
269 |
|
|
#define pDMA3_CONFIG ((volatile unsigned short *)DMA3_CONFIG)
|
270 |
|
|
#define pDMA3_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA3_NEXT_DESC_PTR)
|
271 |
|
|
#define pDMA3_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA3_START_ADDR)
|
272 |
|
|
#define pDMA3_X_COUNT ((volatile unsigned short *)DMA3_X_COUNT)
|
273 |
|
|
#define pDMA3_Y_COUNT ((volatile unsigned short *)DMA3_Y_COUNT)
|
274 |
|
|
#define pDMA3_X_MODIFY ((volatile signed short *)DMA3_X_MODIFY)
|
275 |
|
|
#define pDMA3_Y_MODIFY ((volatile signed short *)DMA3_Y_MODIFY)
|
276 |
|
|
#define pDMA3_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA3_CURR_DESC_PTR)
|
277 |
|
|
#define pDMA3_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA3_CURR_ADDR)
|
278 |
|
|
#define pDMA3_CURR_X_COUNT ((volatile unsigned short *)DMA3_CURR_X_COUNT)
|
279 |
|
|
#define pDMA3_CURR_Y_COUNT ((volatile unsigned short *)DMA3_CURR_Y_COUNT)
|
280 |
|
|
#define pDMA3_IRQ_STATUS ((volatile unsigned short *)DMA3_IRQ_STATUS)
|
281 |
|
|
#define pDMA3_PERIPHERAL_MAP ((volatile unsigned short *)DMA3_PERIPHERAL_MAP)
|
282 |
|
|
|
283 |
|
|
#define pDMA4_CONFIG ((volatile unsigned short *)DMA4_CONFIG)
|
284 |
|
|
#define pDMA4_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA4_NEXT_DESC_PTR)
|
285 |
|
|
#define pDMA4_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA4_START_ADDR)
|
286 |
|
|
#define pDMA4_X_COUNT ((volatile unsigned short *)DMA4_X_COUNT)
|
287 |
|
|
#define pDMA4_Y_COUNT ((volatile unsigned short *)DMA4_Y_COUNT)
|
288 |
|
|
#define pDMA4_X_MODIFY ((volatile signed short *)DMA4_X_MODIFY)
|
289 |
|
|
#define pDMA4_Y_MODIFY ((volatile signed short *)DMA4_Y_MODIFY)
|
290 |
|
|
#define pDMA4_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA4_CURR_DESC_PTR)
|
291 |
|
|
#define pDMA4_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA4_CURR_ADDR)
|
292 |
|
|
#define pDMA4_CURR_X_COUNT ((volatile unsigned short *)DMA4_CURR_X_COUNT)
|
293 |
|
|
#define pDMA4_CURR_Y_COUNT ((volatile unsigned short *)DMA4_CURR_Y_COUNT)
|
294 |
|
|
#define pDMA4_IRQ_STATUS ((volatile unsigned short *)DMA4_IRQ_STATUS)
|
295 |
|
|
#define pDMA4_PERIPHERAL_MAP ((volatile unsigned short *)DMA4_PERIPHERAL_MAP)
|
296 |
|
|
|
297 |
|
|
#define pDMA5_CONFIG ((volatile unsigned short *)DMA5_CONFIG)
|
298 |
|
|
#define pDMA5_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA5_NEXT_DESC_PTR)
|
299 |
|
|
#define pDMA5_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA5_START_ADDR)
|
300 |
|
|
#define pDMA5_X_COUNT ((volatile unsigned short *)DMA5_X_COUNT)
|
301 |
|
|
#define pDMA5_Y_COUNT ((volatile unsigned short *)DMA5_Y_COUNT)
|
302 |
|
|
#define pDMA5_X_MODIFY ((volatile signed short *)DMA5_X_MODIFY)
|
303 |
|
|
#define pDMA5_Y_MODIFY ((volatile signed short *)DMA5_Y_MODIFY)
|
304 |
|
|
#define pDMA5_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA5_CURR_DESC_PTR)
|
305 |
|
|
#define pDMA5_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA5_CURR_ADDR)
|
306 |
|
|
#define pDMA5_CURR_X_COUNT ((volatile unsigned short *)DMA5_CURR_X_COUNT)
|
307 |
|
|
#define pDMA5_CURR_Y_COUNT ((volatile unsigned short *)DMA5_CURR_Y_COUNT)
|
308 |
|
|
#define pDMA5_IRQ_STATUS ((volatile unsigned short *)DMA5_IRQ_STATUS)
|
309 |
|
|
#define pDMA5_PERIPHERAL_MAP ((volatile unsigned short *)DMA5_PERIPHERAL_MAP)
|
310 |
|
|
|
311 |
|
|
#define pDMA6_CONFIG ((volatile unsigned short *)DMA6_CONFIG)
|
312 |
|
|
#define pDMA6_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA6_NEXT_DESC_PTR)
|
313 |
|
|
#define pDMA6_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA6_START_ADDR)
|
314 |
|
|
#define pDMA6_X_COUNT ((volatile unsigned short *)DMA6_X_COUNT)
|
315 |
|
|
#define pDMA6_Y_COUNT ((volatile unsigned short *)DMA6_Y_COUNT)
|
316 |
|
|
#define pDMA6_X_MODIFY ((volatile signed short *)DMA6_X_MODIFY)
|
317 |
|
|
#define pDMA6_Y_MODIFY ((volatile signed short *)DMA6_Y_MODIFY)
|
318 |
|
|
#define pDMA6_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA6_CURR_DESC_PTR)
|
319 |
|
|
#define pDMA6_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA6_CURR_ADDR)
|
320 |
|
|
#define pDMA6_CURR_X_COUNT ((volatile unsigned short *)DMA6_CURR_X_COUNT)
|
321 |
|
|
#define pDMA6_CURR_Y_COUNT ((volatile unsigned short *)DMA6_CURR_Y_COUNT)
|
322 |
|
|
#define pDMA6_IRQ_STATUS ((volatile unsigned short *)DMA6_IRQ_STATUS)
|
323 |
|
|
#define pDMA6_PERIPHERAL_MAP ((volatile unsigned short *)DMA6_PERIPHERAL_MAP)
|
324 |
|
|
|
325 |
|
|
#define pDMA7_CONFIG ((volatile unsigned short *)DMA7_CONFIG)
|
326 |
|
|
#define pDMA7_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA7_NEXT_DESC_PTR)
|
327 |
|
|
#define pDMA7_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA7_START_ADDR)
|
328 |
|
|
#define pDMA7_X_COUNT ((volatile unsigned short *)DMA7_X_COUNT)
|
329 |
|
|
#define pDMA7_Y_COUNT ((volatile unsigned short *)DMA7_Y_COUNT)
|
330 |
|
|
#define pDMA7_X_MODIFY ((volatile signed short *)DMA7_X_MODIFY)
|
331 |
|
|
#define pDMA7_Y_MODIFY ((volatile signed short *)DMA7_Y_MODIFY)
|
332 |
|
|
#define pDMA7_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA7_CURR_DESC_PTR)
|
333 |
|
|
#define pDMA7_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA7_CURR_ADDR)
|
334 |
|
|
#define pDMA7_CURR_X_COUNT ((volatile unsigned short *)DMA7_CURR_X_COUNT)
|
335 |
|
|
#define pDMA7_CURR_Y_COUNT ((volatile unsigned short *)DMA7_CURR_Y_COUNT)
|
336 |
|
|
#define pDMA7_IRQ_STATUS ((volatile unsigned short *)DMA7_IRQ_STATUS)
|
337 |
|
|
#define pDMA7_PERIPHERAL_MAP ((volatile unsigned short *)DMA7_PERIPHERAL_MAP)
|
338 |
|
|
|
339 |
|
|
#define pMDMA_D1_CONFIG ((volatile unsigned short *)MDMA_D1_CONFIG)
|
340 |
|
|
#define pMDMA_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D1_NEXT_DESC_PTR)
|
341 |
|
|
#define pMDMA_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D1_START_ADDR)
|
342 |
|
|
#define pMDMA_D1_X_COUNT ((volatile unsigned short *)MDMA_D1_X_COUNT)
|
343 |
|
|
#define pMDMA_D1_Y_COUNT ((volatile unsigned short *)MDMA_D1_Y_COUNT)
|
344 |
|
|
#define pMDMA_D1_X_MODIFY ((volatile signed short *)MDMA_D1_X_MODIFY)
|
345 |
|
|
#define pMDMA_D1_Y_MODIFY ((volatile signed short *)MDMA_D1_Y_MODIFY)
|
346 |
|
|
#define pMDMA_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_DESC_PTR)
|
347 |
|
|
#define pMDMA_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_ADDR)
|
348 |
|
|
#define pMDMA_D1_CURR_X_COUNT ((volatile unsigned short *)MDMA_D1_CURR_X_COUNT)
|
349 |
|
|
#define pMDMA_D1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D1_CURR_Y_COUNT)
|
350 |
|
|
#define pMDMA_D1_IRQ_STATUS ((volatile unsigned short *)MDMA_D1_IRQ_STATUS)
|
351 |
|
|
#define pMDMA_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D1_PERIPHERAL_MAP)
|
352 |
|
|
|
353 |
|
|
#define pMDMA_S1_CONFIG ((volatile unsigned short *)MDMA_S1_CONFIG)
|
354 |
|
|
#define pMDMA_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S1_NEXT_DESC_PTR)
|
355 |
|
|
#define pMDMA_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S1_START_ADDR)
|
356 |
|
|
#define pMDMA_S1_X_COUNT ((volatile unsigned short *)MDMA_S1_X_COUNT)
|
357 |
|
|
#define pMDMA_S1_Y_COUNT ((volatile unsigned short *)MDMA_S1_Y_COUNT)
|
358 |
|
|
#define pMDMA_S1_X_MODIFY ((volatile signed short *)MDMA_S1_X_MODIFY)
|
359 |
|
|
#define pMDMA_S1_Y_MODIFY ((volatile signed short *)MDMA_S1_Y_MODIFY)
|
360 |
|
|
#define pMDMA_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_DESC_PTR)
|
361 |
|
|
#define pMDMA_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_ADDR)
|
362 |
|
|
#define pMDMA_S1_CURR_X_COUNT ((volatile unsigned short *)MDMA_S1_CURR_X_COUNT)
|
363 |
|
|
#define pMDMA_S1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S1_CURR_Y_COUNT)
|
364 |
|
|
#define pMDMA_S1_IRQ_STATUS ((volatile unsigned short *)MDMA_S1_IRQ_STATUS)
|
365 |
|
|
#define pMDMA_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S1_PERIPHERAL_MAP)
|
366 |
|
|
|
367 |
|
|
#define pMDMA_D0_CONFIG ((volatile unsigned short *)MDMA_D0_CONFIG)
|
368 |
|
|
#define pMDMA_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D0_NEXT_DESC_PTR)
|
369 |
|
|
#define pMDMA_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D0_START_ADDR)
|
370 |
|
|
#define pMDMA_D0_X_COUNT ((volatile unsigned short *)MDMA_D0_X_COUNT)
|
371 |
|
|
#define pMDMA_D0_Y_COUNT ((volatile unsigned short *)MDMA_D0_Y_COUNT)
|
372 |
|
|
#define pMDMA_D0_X_MODIFY ((volatile signed short *)MDMA_D0_X_MODIFY)
|
373 |
|
|
#define pMDMA_D0_Y_MODIFY ((volatile signed short *)MDMA_D0_Y_MODIFY)
|
374 |
|
|
#define pMDMA_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_DESC_PTR)
|
375 |
|
|
#define pMDMA_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_ADDR)
|
376 |
|
|
#define pMDMA_D0_CURR_X_COUNT ((volatile unsigned short *)MDMA_D0_CURR_X_COUNT)
|
377 |
|
|
#define pMDMA_D0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D0_CURR_Y_COUNT)
|
378 |
|
|
#define pMDMA_D0_IRQ_STATUS ((volatile unsigned short *)MDMA_D0_IRQ_STATUS)
|
379 |
|
|
#define pMDMA_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D0_PERIPHERAL_MAP)
|
380 |
|
|
|
381 |
|
|
#define pMDMA_S0_CONFIG ((volatile unsigned short *)MDMA_S0_CONFIG)
|
382 |
|
|
#define pMDMA_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S0_NEXT_DESC_PTR)
|
383 |
|
|
#define pMDMA_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S0_START_ADDR)
|
384 |
|
|
#define pMDMA_S0_X_COUNT ((volatile unsigned short *)MDMA_S0_X_COUNT)
|
385 |
|
|
#define pMDMA_S0_Y_COUNT ((volatile unsigned short *)MDMA_S0_Y_COUNT)
|
386 |
|
|
#define pMDMA_S0_X_MODIFY ((volatile signed short *)MDMA_S0_X_MODIFY)
|
387 |
|
|
#define pMDMA_S0_Y_MODIFY ((volatile signed short *)MDMA_S0_Y_MODIFY)
|
388 |
|
|
#define pMDMA_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_DESC_PTR)
|
389 |
|
|
#define pMDMA_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_ADDR)
|
390 |
|
|
#define pMDMA_S0_CURR_X_COUNT ((volatile unsigned short *)MDMA_S0_CURR_X_COUNT)
|
391 |
|
|
#define pMDMA_S0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S0_CURR_Y_COUNT)
|
392 |
|
|
#define pMDMA_S0_IRQ_STATUS ((volatile unsigned short *)MDMA_S0_IRQ_STATUS)
|
393 |
|
|
#define pMDMA_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S0_PERIPHERAL_MAP)
|
394 |
|
|
|
395 |
|
|
|
396 |
|
|
|
397 |
|
|
/* Parallel Peripheral Interface (PPI) */
|
398 |
|
|
#define pPPI_CONTROL ((volatile unsigned short *)PPI_CONTROL)
|
399 |
|
|
#define pPPI_STATUS ((volatile unsigned short *)PPI_STATUS)
|
400 |
|
|
#define pPPI_COUNT ((volatile unsigned short *)PPI_COUNT)
|
401 |
|
|
#define pPPI_DELAY ((volatile unsigned short *)PPI_DELAY)
|
402 |
|
|
#define pPPI_FRAME ((volatile unsigned short *)PPI_FRAME)
|
403 |
|
|
|
404 |
|
|
#endif /* _CDEF_BF532_H */
|