OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [newlib-1.18.0/] [libgloss/] [m68k/] [sbc5204.ld] - Blame information for rev 207

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 207 jeremybenn
/* STARTUP(crt0.o) */
2
OUTPUT_ARCH(m68k)
3
/* Uncomment this if you want srecords. This is needed for a.out
4
 * if you plan to use GDB.
5
OUTPUT_FORMAT(srec)
6
 */
7
SEARCH_DIR(.)
8
GROUP(-ldbug -lc -lgcc)
9
__DYNAMIC  =  0;
10
 
11
/*
12
 * Setup the memory map of the Arnewsh SBC5204
13
 * stack grows down from high memory.
14
 *
15
 * The memory map look like this:
16
 * +--------------------+ <- low memory
17
 * | .text              |
18
 * |        _etext      |
19
 * |        ctor list   | the ctor and dtor lists are for
20
 * |        dtor list   | C++ support
21
 * +--------------------+
22
 * | .data              | initialized data goes here
23
 * |        _edata      |
24
 * +--------------------+
25
 * | .bss               |
26
 * |        __bss_start | start of bss, cleared by crt0
27
 * |        _end        | start of heap, used by sbrk()
28
 * +--------------------+
29
 * .                    .
30
 * .                    .
31
 * .                    .
32
 * |        __stack     | top of stack
33
 * +--------------------+
34
 */
35
MEMORY
36
{
37
  ram (rwx) : ORIGIN = 0x10000, LENGTH = 0x30000
38
}
39
 
40
/*
41
 * allocate the stack to be at the top of memory, since the stack
42
 * grows down
43
 */
44
 
45
PROVIDE (__stack = 0x30000);
46
 
47
/*
48
 * Initalize some symbols to be zero so we can reference them in the
49
 * crt0 without core dumping. These functions are all optional, but
50
 * we do this so we can have our crt0 always use them if they exist.
51
 * This is so BSPs work better when using the crt0 installed with gcc.
52
 * We have to initalize them twice, so we cover a.out (which prepends
53
 * an underscore) and coff object file formats.
54
 */
55
PROVIDE (hardware_init_hook = 0);
56
PROVIDE (_hardware_init_hook = 0);
57
PROVIDE (software_init_hook = 0);
58
PROVIDE (_software_init_hook = 0);
59
/*
60
 * stick everything in ram (of course)
61
 */
62
SECTIONS
63
{
64
  .text :
65
  {
66
    *(.text .text.*)
67
    . = ALIGN(0x4);
68
     __CTOR_LIST__ = .;
69
    ___CTOR_LIST__ = .;
70
    LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
71
    *(.ctors)
72
    LONG(0)
73
    __CTOR_END__ = .;
74
    __DTOR_LIST__ = .;
75
    ___DTOR_LIST__ = .;
76
    LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
77
    *(.dtors)
78
     LONG(0)
79
    __DTOR_END__ = .;
80
    *(.rodata .rodata.*)
81
    *(.gcc_except_table)
82
 
83
    . = ALIGN(0x2);
84
    __INIT_SECTION__ = . ;
85
    LONG (0x4e560000)   /* linkw %fp,#0 */
86
    *(.init)
87
    SHORT (0x4e5e)      /* unlk %fp */
88
    SHORT (0x4e75)      /* rts */
89
 
90
    __FINI_SECTION__ = . ;
91
    LONG (0x4e560000)   /* linkw %fp,#0 */
92
    *(.fini)
93
    SHORT (0x4e5e)      /* unlk %fp */
94
    SHORT (0x4e75)      /* rts */
95
 
96
    _etext = .;
97
    *(.lit)
98
  } > ram
99
 
100
  .data :
101
  {
102
    *(.got.plt) *(.got)
103
    *(.shdata)
104
    *(.data .data.*)
105
    _edata = .;
106
  } > ram
107
 
108
  .bss :
109
  {
110
    . = ALIGN(0x4);
111
    __bss_start = . ;
112
    *(.shbss)
113
    *(.bss .bss.*)
114
    *(COMMON)
115
    _end =  ALIGN (0x8);
116
    __end = _end;
117
  } > ram
118
 
119
  .stab 0 (NOLOAD) :
120
  {
121
    *(.stab)
122
  }
123
 
124
  .stabstr 0 (NOLOAD) :
125
  {
126
    *(.stabstr)
127
  }
128
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.