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[/] [openrisc/] [trunk/] [gnu-stable/] [newlib-1.18.0/] [libgloss/] [mips/] [crt0.S] - Blame information for rev 829

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Line No. Rev Author Line
1 207 jeremybenn
/*
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 * crt0.S -- startup file for MIPS.
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 *
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 * Copyright (c) 1995, 1996, 1997, 2001 Cygnus Support
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 *
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 * The authors hereby grant permission to use, copy, modify, distribute,
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 * and license this software and its documentation for any purpose, provided
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 * that existing copyright notices are retained in all copies and that this
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 * notice is included verbatim in any distributions. No written agreement,
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 * license, or royalty fee is required for any of the authorized uses.
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 * Modifications to this software may be copyrighted by their authors
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 * and need not follow the licensing terms described here, provided that
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 * the new terms are clearly indicated on the first page of each file where
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 * they apply.
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 */
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#ifdef __mips16
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/* This file contains 32 bit assembly code.  */
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        .set nomips16
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#endif
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#include "regs.S"
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/*
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 * Set up some room for a stack. We just grab a chunk of memory.
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 */
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#define STACK_SIZE  0x4000
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#define GLOBAL_SIZE 0x2000
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#define STARTUP_STACK_SIZE      0x0100
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/* This is for referencing addresses that are not in the .sdata or
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   .sbss section under embedded-pic, or before we've set up gp.  */
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#ifdef __mips_embedded_pic
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# ifdef __mips64
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#  define LA(t,x) la t,x-PICBASE ; daddu t,s0,t
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# else
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#  define LA(t,x) la t,x-PICBASE ; addu t,s0,t
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# endif
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#else /* __mips_embedded_pic */
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# define LA(t,x) la t,x
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#endif /* __mips_embedded_pic */
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        .comm   __memsize, 12
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        .comm   __lstack, STARTUP_STACK_SIZE
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        .text
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        .align  2
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/* Without the following nop, GDB thinks _start is a data variable.
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 * This is probably a bug in GDB in handling a symbol that is at the
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 * start of the .text section.
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 */
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        nop
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        .globl  hardware_hazard_hook .text
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        .globl  _start
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        .ent    _start
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_start:
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        .set    noreorder
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#ifdef __mips_embedded_pic
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#define PICBASE start_PICBASE
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        PICBASE = .+8
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        bal     PICBASE
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        nop
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        move    s0,$31
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#endif
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#if __mips<3
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#  define STATUS_MASK (SR_CU1|SR_PE)
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#else
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/* Post-mips2 has no SR_PE bit.  */
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#  ifdef __mips64
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/* Turn on 64-bit addressing and additional float regs.  */
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#    define STATUS_MASK (SR_CU1|SR_FR|SR_KX|SR_SX|SR_UX)
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#  else
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#    if __mips_fpr==32
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#      define STATUS_MASK (SR_CU1)
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#    else
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/* Turn on additional float regs.  */
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#      define STATUS_MASK (SR_CU1|SR_FR)
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#    endif
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#  endif
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#endif
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        li      v0, STATUS_MASK
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        mtc0    v0, C0_SR
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        mtc0    zero, C0_CAUSE
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        nop
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        /* Avoid hazard from FPU enable and other SR changes.  */
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        LA (t0, hardware_hazard_hook)
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        beq     t0,zero,1f
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        nop
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        jal     t0
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        nop
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1:
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/* Check for FPU presence.  Don't check if we know that soft_float is
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   being used.  (This also avoids illegal instruction exceptions.)  */
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#ifndef __mips_soft_float
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        li      t2,0xAAAA5555
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        mtc1    t2,fp0          /* write to FPR 0 */
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        mtc1    zero,fp1        /* write to FPR 1 */
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        mfc1    t0,fp0
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        mfc1    t1,fp1
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        nop
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        bne     t0,t2,1f        /* check for match */
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        nop
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        bne     t1,zero,1f      /* double check */
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        nop
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        j       2f              /* FPU is present. */
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        nop
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#endif
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1:
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        /* FPU is not present.  Set status register to say that. */
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        li      v0, (STATUS_MASK-(STATUS_MASK & SR_CU1))
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        mtc0    v0, C0_SR
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        nop
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        /* Avoid hazard from FPU disable.  */
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        LA (t0, hardware_hazard_hook)
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        beq     t0,zero,2f
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        nop
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        jal     t0
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        nop
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2:
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/* Fix high bits, if any, of the PC so that exception handling
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   doesn't get confused.  */
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        LA (v0, 3f)
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        jr      v0
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        nop
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3:
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        LA (gp, _gp)                            # set the global data pointer
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        .end _start
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/*
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 * zero out the bss section.
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 */
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        .globl  __memsize
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        .globl  get_mem_info .text
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        .globl  __stack
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        .globl  __global
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        .ent    zerobss
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zerobss:
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        LA (v0, _fbss)
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        LA (v1, _end)
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3:
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        sw      zero,0(v0)
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        bltu    v0,v1,3b
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        addiu   v0,v0,4                         # executed in delay slot
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        la      t0, __lstack                    # make a small stack so we
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        addiu   sp, t0, STARTUP_STACK_SIZE      # can run some C code
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        la      a0, __memsize                   # get the usable memory size
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        jal     get_mem_info
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        nop
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        /* setup the stack pointer */
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        LA (t0, __stack)                        # is __stack set ?
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        bne     t0,zero,4f
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        nop
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        /* NOTE: a0[0] contains the amount of memory available, and
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                 not the last memory address. */
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        la      a0, __memsize
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        lw      t0,0(a0)                        # last address of memory available
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        la      t1,K0BASE                       # cached kernel memory
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        addu    t0,t0,t1                        # get the end of memory address
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        /* Allocate 32 bytes for the register parameters.  Allocate 16
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           bytes for a null argv and envp.  Round the result up to 64
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           bytes to preserve alignment.  */
173
        subu    t0,t0,64
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4:
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        move    sp,t0                           # set stack pointer
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        .end    zerobss
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/*
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 * initialize target specific stuff. Only execute these
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 * functions it they exist.
181
 */
182
        .globl  hardware_init_hook .text
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        .globl  software_init_hook .text
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        .type   _fini,@function
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        .type   _init,@function
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        .globl  atexit .text
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        .globl  exit .text
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        .ent    init
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init:
190
        LA (t9, hardware_init_hook)             # init the hardware if needed
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        beq     t9,zero,6f
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        nop
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        jal     t9
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        nop
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6:
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        LA (t9, software_init_hook)             # init the hardware if needed
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        beq     t9,zero,7f
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        nop
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        jal     t9
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        nop
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7:
202
        LA (a0, _fini)
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        jal     atexit
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        nop
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#ifdef GCRT0
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        .globl  _ftext
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        .globl  _extext
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        LA (a0, _ftext)
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        LA (a1, _etext)
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        jal     monstartup
212
        nop
213
#endif
214
 
215
 
216
        jal     _init                           # run global constructors
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        nop
218
 
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        addiu   a1,sp,32                        # argv = sp + 32
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        addiu   a2,sp,40                        # envp = sp + 40
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#if __mips64
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        sd      zero,(a1)                       # argv[argc] = 0
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        sd      zero,(a2)                       # envp[0] = 0
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#else
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        sw      zero,(a1)
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        sw      zero,(a2)
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#endif
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        jal     main                            # call the program start function
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        move    a0,zero                         # set argc to 0
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        # fall through to the "exit" routine
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        jal     exit                            # call libc exit to run the G++
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                                                # destructors
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        move    a0,v0                           # pass through the exit code
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        .end    init
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/* Assume the PICBASE set up above is no longer valid below here.  */
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#ifdef __mips_embedded_pic
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#undef PICBASE
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#endif
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/*
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 * _exit -- Exit from the application. Normally we cause a user trap
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 *          to return to the ROM monitor for another run. NOTE: This is
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 *          the only other routine we provide in the crt0.o object, since
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 *          it may be tied to the "_start" routine. It also allows
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 *          executables that contain a complete world to be linked with
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 *          just the crt0.o object.
250
 */
251
        .globl  hardware_exit_hook .text
252
        .globl  _exit
253
        .ent _exit
254
_exit:
255
7:
256
#ifdef __mips_embedded_pic
257
        /* Need to reinit PICBASE, since we might be called via exit()
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           rather than via a return path which would restore old s0.  */
259
#define PICBASE exit_PICBASE
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        PICBASE = .+8
261
        bal     PICBASE
262
        nop
263
        move    s0,$31
264
#endif
265
#ifdef GCRT0
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        LA (t0, _mcleanup)
267
        jal     t0
268
        nop
269
#endif
270
        LA (t0, hardware_exit_hook)
271
        beq     t0,zero,1f
272
        nop
273
        jal     t0
274
        nop
275
1:
276
 
277
        # break instruction can cope with 0xfffff, but GAS limits the range:
278
        break   1023
279
        b       7b                              # but loop back just in-case
280
        nop
281
        .end _exit
282
 
283
/* Assume the PICBASE set up above is no longer valid below here.  */
284
#ifdef __mips_embedded_pic
285
#undef PICBASE
286
#endif
287
 
288
/* EOF crt0.S */

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