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[/] [openrisc/] [trunk/] [gnu-stable/] [newlib-1.18.0/] [libgloss/] [sparc/] [sparclite.h] - Blame information for rev 829

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1 207 jeremybenn
/* SPARClite defs
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 *
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 * Copyright (c) 1995 Cygnus Support
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 *
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 * The authors hereby grant permission to use, copy, modify, distribute,
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 * and license this software and its documentation for any purpose, provided
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 * that existing copyright notices are retained in all copies and that this
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 * notice is included verbatim in any distributions. No written agreement,
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 * license, or royalty fee is required for any of the authorized uses.
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 * Modifications to this software may be copyrighted by their authors
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 * and need not follow the licensing terms described here, provided that
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 * the new terms are clearly indicated on the first page of each file where
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 * they apply.
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 */
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/* Macros for reading and writing to arbitrary address spaces.  Note that ASI
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   must be a constant (sorry, but the SPARC can only specify ASIs as part of an
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   instruction.  */
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#define read_asi(ASI, LOC)                                              \
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  ({                                                                    \
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    unsigned int val;                                                   \
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    __asm__ volatile ("lda [%r1]%2,%0" : "=r" (val) : "rJ" (LOC), "I" (ASI)); \
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    val;                                                                \
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  })
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#define write_asi(ASI, LOC, VAL) \
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  __asm__ volatile ("sta %0,[%r1]%2" : : "r" (VAL), "rJ" (LOC), "I" (ASI))
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/* Use this when modifying registers that cause memory to be modified.  This
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   will cause GCC to reload all values after this point.  */
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#define write_asi_volatile(ASI, LOC, VAL) \
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  __asm__ volatile ("sta %0,[%r1]%2" : : "r" (VAL), "rJ" (LOC), "I" (ASI) \
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                    : "memory")
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/* Read the PSR (processor state register). */
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#define read_psr()                                                      \
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  ({                                                                    \
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    unsigned int psr;                                                   \
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    __asm__ ("mov %%psr, %0" : "=r" (psr));                             \
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    psr;                                                                \
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  })
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/* Write the PSR. */
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#define write_psr(VAL)                                                  \
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  __asm__ ("mov %0, %%psr \n nop \n nop \n nop" : : "r" (VAL))
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/* Read the specified Ancillary State Register. */
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#define read_asr(REG) read_asr1(REG)
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#define read_asr1(REG)                                                  \
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  ({                                                                    \
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    unsigned int val;                                                   \
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    __asm__ ("rd %%asr" #REG ",%0" : "=r" (val));                       \
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    val;                                                                \
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  })
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/* Write the specified Ancillary State Register. */
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#define write_asr(REG, VAL) write_asr1(REG, VAL)
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#define write_asr1(REG, VAL)                                            \
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    __asm__ ("wr %0, 0, %%asr" #REG : : "r" (VAL))
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/* Set window size for window overflow and underflow trap handlers.  Better to
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   do this at at compile time than to calculate them at compile time each time
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   we get a window overflow/underflow trap.  */
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#ifdef SL933
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        asm ("__WINSIZE=6");
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#else
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        asm ("__WINSIZE=8");
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#endif
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#define PSR_INIT   0x10c0       /* Disable traps, set s and ps */
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#define TBR_INIT   0
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#define WIM_INIT   2
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#define STACK_SIZE 16 * 1024
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