OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [newlib-1.18.0/] [libgloss/] [xc16x/] [open.c] - Blame information for rev 862

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 207 jeremybenn
/*
2
 * Copyright (C) 2006 KPIT Cummins
3
 * Copyright (C) 2009 Conny Marco Menebröcker
4
 * All rights reserved.
5
 *
6
 * Redistribution and use in source and binary forms is permitted
7
 * provided that the above copyright notice and following paragraph are
8
 * duplicated in all such forms.
9
 *
10
 * This file is distributed WITHOUT ANY WARRANTY; without even the implied
11
 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
 */
13
#include<sys/types.h>
14
#include<sys/stat.h>
15
/*volatile int opensys(char *name,int flags,int perms)
16
{
17
 #ifndef __xc16xL__
18
        asm volatile("push r11\n"
19
                     "mov r11,r10 \n"
20
                     " mov r10,r9  \n"
21
                     " mov r9,#0x300 \n"
22
                     );
23
 
24
  #endif
25
 
26
asm volatile("trap #5");
27
#ifndef __xc16xL__
28
asm volatile("pop r11");
29
#endif
30
}*/
31
 
32
int _open(char *name,int flags,int perms)
33
{
34
 int temp;
35
 
36
  temp=opensys(name,flags,perms);
37
return temp;
38
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.