OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1k_startup/] [rtl/] [verilog/] [Makefile] - Blame information for rev 179

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 marcus.erl
spi:
2
        vppp --simple spi_clgen.v spi_shift.v spi_top.v | cat copyright_spi.v - > spi_flash.v
3
 
4
OR1K_startup:
5
        vppp --simple +define+SPI_BASE_MSB+B000 OR1K_startup_generic.v | cat copyright_OR1K_startup.v - > OR1K_startup.v
6
 
7
OR1K_startup_ACTEL:
8
        vppp --simple OR1K_startup_ACTEL.v | cat copyright_OR1K_startup.v - > OR1K_startup_ACTEL_IP.v
9
 
10
all: spi OR1K_startup OR1K_startup_ACTEL
11
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.