OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [NEWS] - Blame information for rev 250

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 85 jeremybenn
              Or1ksim: The OpenRISC 1000 Architectural Simulator
2
              ==================================================
3
 
4
 
5 143 jeremybenn
New in top of tree
6
==================
7
 
8
The library interface is extended to allow registers and memory to be written
9
directly. This is to allow direct integration as a simulator in GDB.
10
 
11 224 jeremybenn
The "include" feature of configuration files (which never worked, but no one
12
ever noticed) is dropped.
13
 
14
If the configuration file is not found in the local directory, it is searched
15
for in the ${HOME}/.or1ksim directory, then (for backwards compatibility) the
16
${HOME}/.or1k directory.
17
 
18
There is an option to collect statistics on instruction execution in binary
19
form.
20
 
21
 
22 143 jeremybenn
The following bugs are fixed.
23
* Bug 1797: Or1ksim does not compile with GCC 3.4.4 under Cygwin
24
* Bug 1795: GDB breakpoints do not work with Icache enabled.
25
 
26 134 jeremybenn
New in release 0.4.0
27
====================
28
 
29
No new features or bugs. This is the full release based on 0.4.0rc2.
30
 
31
 
32 127 jeremybenn
New in release 0.4.0rc2
33
=======================
34 107 jeremybenn
 
35
No new features are provided, pending full release of 0.4.0.
36
 
37 124 jeremybenn
The configuration options --enable-arith-flag and --enable-ov-flag have been
38
removed, since they were the source of bugs, notably Bugs 1782, 1783 and 1784.
39
 
40 127 jeremybenn
The configuration option --enable-unsigned-xori has been added to allow a
41
conditional solution to Bug 1790.
42
 
43 107 jeremybenn
The following bugs are fixed.
44
* Bug 1770: l.div does not set carry or give correct exception.
45 114 jeremybenn
* Bug 1771: l.add* do not correctly set the overflow flag.
46 115 jeremybenn
* Bug 1772: l.fl1 not implemented.
47 116 jeremybenn
* Bug 1773: l.maci not correctly implemented.
48 118 jeremybenn
* Bug 1774: l.mulu not implemented.
49 121 jeremybenn
* Bug 1775: l.jalr and l.jr don't trigger alignment exceptions.
50 114 jeremybenn
* Bug 1776: l.addic is not implemented.
51 122 jeremybenn
* Bug 1777: l.macrc not correctly implemented.
52
* Bug 1778: l.ror and l.rori are not implemented.
53 123 jeremybenn
* Bug 1779: l.mtspr implementation is incorrect.
54 124 jeremybenn
* Bug 1782: Or1ksim setting of overflow flag is wrong.
55
* Bug 1783: Or1ksim definition of overflow is wrong.
56
* Bug 1784: Or1ksim does not trigger overflow exceptions.
57 127 jeremybenn
* Bug 1790: l.xori implementation is incorrect.
58 107 jeremybenn
 
59
The following bugs are either cannot be reproduced or will not be fixed.
60
 
61
The following bugs are outstanding
62 114 jeremybenn
* Bug 1758: Memory controller issues. Workaround in the user guide.
63 107 jeremybenn
 
64
 
65 104 jeremybenn
New in release 0.4.0rc1
66
=======================
67 85 jeremybenn
 
68 86 jeremybenn
The following new features are provided.
69 85 jeremybenn
* testbench now renamed testsuite and fully integrated using DejaGNU.
70
  "make check" now works correctly if the OpenRISC toolchain is installed.
71 86 jeremybenn
* New configuration flag --enable-all-tests to enable building of incomplete
72
  tests with "make check".
73 104 jeremybenn
* The library offers an interface via modelled JTAG
74
* Single precision floating point is available.
75 85 jeremybenn
 
76 86 jeremybenn
The user guide is updated.
77
 
78
The following feature requests have been accepted.
79 104 jeremybenn
* Feature  413: ORFPX32 single precision floating point now supported.
80 85 jeremybenn
* Feature  469: Icache tags now intialized as invalid.
81
* Feature 1673: Or1ksim now builds on Mac OS X.
82
* Feature 1678: download, patch and build dirs removed from SVN.
83
 
84 86 jeremybenn
The following feature requests have been rejected.
85 85 jeremybenn
* Feature  399: Writeable SR_LEE bit will not be provided.
86
* Feature  409: Separate ELF loader library already exists in binutils.
87
* Feature  586: Ignoring HW breakpoints is already possible.
88
 
89 89 jeremybenn
The following bugs are fixed.
90
* Bug  534: Test suite fixed (see above).
91
* Bug 1710: mprofile now handles mode args correctly.
92
* Bug 1723: PS2 keyboard error message clearer if RX file won't open.
93 104 jeremybenn
* Bug 1733: Or1ksim now accepts ELF image when working through RSP.
94
* Bug 1767: l.lws is not recognized as an opcode.
95 85 jeremybenn
 
96 89 jeremybenn
The following bugs are either cannot be reproduced or will not be fixed.
97
 
98 104 jeremybenn
The following bugs are outstanding
99
* Bug 1758: Memory controller issues. Workaround in the user guide.
100 89 jeremybenn
 
101 104 jeremybenn
 
102 19 jeremybenn
New in release 0.3.0
103 85 jeremybenn
====================
104
 
105 19 jeremybenn
* No new features or bugs. This is the full release based on rc3.
106
 
107
New in release 0.3.0rc3
108 85 jeremybenn
=======================
109
 
110 19 jeremybenn
* Bug 376 fixed: 32 interrupts now supported
111
* Bug 377 fixed: Level triggered interrupts now work correctly
112
* Bug 378 fixed: xterm UART now works with RSP
113
* Bug 379 fixed: RSP performance improved
114
* Bug 380 fixed: GDB 6.8 stepi now works through Or1ksim JTAG interface
115
* Bug 398 fixed: Lack of support for LEE bit in SR documented
116
* Bug 415 fixed: NPC behavior on writing optionally matches real HW
117
* Bug 418 fixed: All library up calls are host-endian
118
 
119
* Feature 395 added: Boot from 0xf0000000 now enabled.
120
* Feature 408 added: Image file may be NULL for or1ksim_init.
121
* Feature 410 added: RSP now clears sigval on unstalling the processor.
122
* Feature 417 added: Or1ksim prints out its version on startup.
123
 
124
New in release 0.3.0rc2
125 85 jeremybenn
=======================
126
 
127 19 jeremybenn
* A number of bug fixes
128
* Updates to user guide
129
 
130
New in release 0.3.0rc1
131 85 jeremybenn
=======================
132
 
133 19 jeremybenn
* Numerous bug fixes (see the OpenRISC tracker and the ChangeLog file)
134
* User Guide
135
* Consistent coding style and file naming throughout
136
* Support for external SystemC models
137
 
138 85 jeremybenn
New in release 1.9 (old style numbering)
139
========================================
140 19 jeremybenn
 
141
* support for binary COFF
142
* generation of verilog memory models (used when you want to run simulation
143
of OpenRISC processor cores)
144
 
145 85 jeremybenn
New in release 1.2 (old style numbering)
146
========================================
147 19 jeremybenn
 
148
* support for OR16 ISA
149
 
150 85 jeremybenn
New in release 1.1 (old style numbering)
151
========================================
152 19 jeremybenn
 
153
 * First release

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.