OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [NEWS] - Blame information for rev 372

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 85 jeremybenn
              Or1ksim: The OpenRISC 1000 Architectural Simulator
2
              ==================================================
3
 
4
 
5 346 jeremybenn
New in release 0.5.0rc1
6
=======================
7 143 jeremybenn
 
8 346 jeremybenn
The floating point implementation is now based on John Hauser's "softfloat"
9
package, ensuring rigorous compliance with the IEEE 754-2008 standard.
10
 
11 143 jeremybenn
The library interface is extended to allow registers and memory to be written
12 346 jeremybenn
directly and processor stalled and unstalled. This is to allow direct
13
integration as a simulator in GDB.
14 143 jeremybenn
 
15 346 jeremybenn
Some of the existing library interface functions have different prototypes.
16
 
17 224 jeremybenn
The "include" feature of configuration files (which never worked, but no one
18
ever noticed) is dropped.
19
 
20
If the configuration file is not found in the local directory, it is searched
21
for in the ${HOME}/.or1ksim directory, then (for backwards compatibility) the
22
${HOME}/.or1k directory.
23
 
24 346 jeremybenn
If no simulation file is specified, then sim.cfg is not searched for as a
25
default.
26 224 jeremybenn
 
27 346 jeremybenn
New options are added -q|--quiet, -V|--verbose, -m|--memory and
28
--report-memory-errors. The semantics of --nosrv and --src otpions are changed.
29 224 jeremybenn
 
30 346 jeremybenn
There is a configuration option to collect statistics on instruction execution
31
in binary form.
32
 
33
In previous versions, Bus exceptions were unique in that they produced an
34
error message on standard output. The default is now for this exception to be
35
handled silently, unless requested by --report-memory-errors.
36
 
37
The following feature requests have been accepted.
38
* Feature  393: Integrate Or1ksim in GDB.
39
 
40
The following feature requests have been rejected.
41
 
42 143 jeremybenn
The following bugs are fixed.
43 346 jeremybenn
* Bug 1821: Reference configuration file has defective debug section.
44
* Bug 1817: Reference configuration file missing from distribution.
45
* Bug 1795: GDB breakpoints do not work with the instruction cache.
46 143 jeremybenn
 
47 346 jeremybenn
The following bugs are either cannot be reproduced or will not be fixed.
48
 
49
The following bugs are outstanding
50
* Bug 1824: Memory controller issue (probably the same as Bug 1758).
51
* Bug 1823: Configuration file error line numbers are wrong.
52
* Bug 1822: ATA section in configuration file is broken.
53
* Bug 1816: Error message when target not set is obscure.
54
* Bug 1813: "make check" fails before installation.
55
* Bug 1758: Memory controller issues. Workaround in the user guide.
56
 
57
 
58 134 jeremybenn
New in release 0.4.0
59
====================
60
 
61
No new features or bugs. This is the full release based on 0.4.0rc2.
62
 
63
 
64 127 jeremybenn
New in release 0.4.0rc2
65
=======================
66 107 jeremybenn
 
67
No new features are provided, pending full release of 0.4.0.
68
 
69 124 jeremybenn
The configuration options --enable-arith-flag and --enable-ov-flag have been
70
removed, since they were the source of bugs, notably Bugs 1782, 1783 and 1784.
71
 
72 127 jeremybenn
The configuration option --enable-unsigned-xori has been added to allow a
73
conditional solution to Bug 1790.
74
 
75 107 jeremybenn
The following bugs are fixed.
76
* Bug 1770: l.div does not set carry or give correct exception.
77 114 jeremybenn
* Bug 1771: l.add* do not correctly set the overflow flag.
78 115 jeremybenn
* Bug 1772: l.fl1 not implemented.
79 116 jeremybenn
* Bug 1773: l.maci not correctly implemented.
80 118 jeremybenn
* Bug 1774: l.mulu not implemented.
81 121 jeremybenn
* Bug 1775: l.jalr and l.jr don't trigger alignment exceptions.
82 114 jeremybenn
* Bug 1776: l.addic is not implemented.
83 122 jeremybenn
* Bug 1777: l.macrc not correctly implemented.
84
* Bug 1778: l.ror and l.rori are not implemented.
85 123 jeremybenn
* Bug 1779: l.mtspr implementation is incorrect.
86 124 jeremybenn
* Bug 1782: Or1ksim setting of overflow flag is wrong.
87
* Bug 1783: Or1ksim definition of overflow is wrong.
88
* Bug 1784: Or1ksim does not trigger overflow exceptions.
89 127 jeremybenn
* Bug 1790: l.xori implementation is incorrect.
90 107 jeremybenn
 
91
The following bugs are either cannot be reproduced or will not be fixed.
92
 
93
The following bugs are outstanding
94 114 jeremybenn
* Bug 1758: Memory controller issues. Workaround in the user guide.
95 107 jeremybenn
 
96
 
97 104 jeremybenn
New in release 0.4.0rc1
98
=======================
99 85 jeremybenn
 
100 86 jeremybenn
The following new features are provided.
101 85 jeremybenn
* testbench now renamed testsuite and fully integrated using DejaGNU.
102
  "make check" now works correctly if the OpenRISC toolchain is installed.
103 86 jeremybenn
* New configuration flag --enable-all-tests to enable building of incomplete
104
  tests with "make check".
105 104 jeremybenn
* The library offers an interface via modelled JTAG
106
* Single precision floating point is available.
107 85 jeremybenn
 
108 86 jeremybenn
The user guide is updated.
109
 
110
The following feature requests have been accepted.
111 104 jeremybenn
* Feature  413: ORFPX32 single precision floating point now supported.
112 85 jeremybenn
* Feature  469: Icache tags now intialized as invalid.
113
* Feature 1673: Or1ksim now builds on Mac OS X.
114
* Feature 1678: download, patch and build dirs removed from SVN.
115
 
116 86 jeremybenn
The following feature requests have been rejected.
117 85 jeremybenn
* Feature  399: Writeable SR_LEE bit will not be provided.
118
* Feature  409: Separate ELF loader library already exists in binutils.
119
* Feature  586: Ignoring HW breakpoints is already possible.
120
 
121 89 jeremybenn
The following bugs are fixed.
122
* Bug  534: Test suite fixed (see above).
123
* Bug 1710: mprofile now handles mode args correctly.
124
* Bug 1723: PS2 keyboard error message clearer if RX file won't open.
125 104 jeremybenn
* Bug 1733: Or1ksim now accepts ELF image when working through RSP.
126
* Bug 1767: l.lws is not recognized as an opcode.
127 85 jeremybenn
 
128 89 jeremybenn
The following bugs are either cannot be reproduced or will not be fixed.
129
 
130 104 jeremybenn
The following bugs are outstanding
131
* Bug 1758: Memory controller issues. Workaround in the user guide.
132 89 jeremybenn
 
133 104 jeremybenn
 
134 19 jeremybenn
New in release 0.3.0
135 85 jeremybenn
====================
136
 
137 19 jeremybenn
* No new features or bugs. This is the full release based on rc3.
138
 
139
New in release 0.3.0rc3
140 85 jeremybenn
=======================
141
 
142 19 jeremybenn
* Bug 376 fixed: 32 interrupts now supported
143
* Bug 377 fixed: Level triggered interrupts now work correctly
144
* Bug 378 fixed: xterm UART now works with RSP
145
* Bug 379 fixed: RSP performance improved
146
* Bug 380 fixed: GDB 6.8 stepi now works through Or1ksim JTAG interface
147
* Bug 398 fixed: Lack of support for LEE bit in SR documented
148
* Bug 415 fixed: NPC behavior on writing optionally matches real HW
149
* Bug 418 fixed: All library up calls are host-endian
150
 
151
* Feature 395 added: Boot from 0xf0000000 now enabled.
152
* Feature 408 added: Image file may be NULL for or1ksim_init.
153
* Feature 410 added: RSP now clears sigval on unstalling the processor.
154
* Feature 417 added: Or1ksim prints out its version on startup.
155
 
156
New in release 0.3.0rc2
157 85 jeremybenn
=======================
158
 
159 19 jeremybenn
* A number of bug fixes
160
* Updates to user guide
161
 
162
New in release 0.3.0rc1
163 85 jeremybenn
=======================
164
 
165 19 jeremybenn
* Numerous bug fixes (see the OpenRISC tracker and the ChangeLog file)
166
* User Guide
167
* Consistent coding style and file naming throughout
168
* Support for external SystemC models
169
 
170 85 jeremybenn
New in release 1.9 (old style numbering)
171
========================================
172 19 jeremybenn
 
173
* support for binary COFF
174
* generation of verilog memory models (used when you want to run simulation
175
of OpenRISC processor cores)
176
 
177 85 jeremybenn
New in release 1.2 (old style numbering)
178
========================================
179 19 jeremybenn
 
180
* support for OR16 ISA
181
 
182 85 jeremybenn
New in release 1.1 (old style numbering)
183
========================================
184 19 jeremybenn
 
185
 * First release

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.