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[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [common/] [trace.c] - Blame information for rev 77

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Line No. Rev Author Line
1 19 jeremybenn
/* trace.c -- Simulator breakpoints
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   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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   Copyright (C) 2008 Embecosm Limited
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   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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   This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
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   This program is free software; you can redistribute it and/or modify it
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   under the terms of the GNU General Public License as published by the Free
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   Software Foundation; either version 3 of the License, or (at your option)
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   any later version.
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   This program is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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   more details.
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   You should have received a copy of the GNU General Public License along
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   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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/* This program is commented throughout in a fashion suitable for processing
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   with Doxygen. */
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/* Autoconf and/or portability configuration */
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#include "config.h"
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/* Package includes */
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#include "trace.h"
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#include "sim-config.h"
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#include "abstract.h"
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#include "labels.h"
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/*---------------------------------------------------------------------------*/
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/*!Set instruction execution breakpoint
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   @param[in] addr  The address for the breakpoint                           */
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/*---------------------------------------------------------------------------*/
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void
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set_insnbrkpoint (oraddr_t addr)
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{
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  addr &= ~ADDR_C (3);          /* 32-bit aligned */
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  if (!verify_memoryarea (addr))
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    {
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      PRINTF
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        ("WARNING: This breakpoint is out of the simulated memory range.\n");
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    }
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  if (has_breakpoint (addr))
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    {
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      remove_breakpoint (addr);
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      PRINTF ("\nBreakpoint at 0x%" PRIxADDR " cleared.\n", addr);
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    }
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  else
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    {
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      add_breakpoint (addr);
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      PRINTF ("\nBreakpoint at 0x%" PRIxADDR " set.\n", addr);
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    }
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  return;
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}       /* set_insnbrkpoint () */

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