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[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or1k/] [arch.h] - Blame information for rev 178

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1 19 jeremybenn
/* arch.h -- OR1K architecture specific macros
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   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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   Copyright (C) 2008 Embecosm Limited
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   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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   This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
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   This program is free software; you can redistribute it and/or modify it
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   under the terms of the GNU General Public License as published by the Free
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   Software Foundation; either version 3 of the License, or (at your option)
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   any later version.
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   This program is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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   more details.
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   You should have received a copy of the GNU General Public License along
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   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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/* This program is commented throughout in a fashion suitable for processing
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   with Doxygen. */
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#ifndef ARCH__H
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#define ARCH__H
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/* Autoconf and/or portability configuration */
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#include "port.h"
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/*! Index of the link register */
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#define LINK_REGNO     9
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/* Conversion macros */
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#define ADDR_C(c)  UINT32_C(c)
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#define REG_C(c)   UINT32_C(c)
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/* Strings for printing OpenRISC types */
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#define PRIxADDR  "08" PRIx32   /*!< print an openrisc address in hex */
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#define PRIxREG   "08" PRIx32   /*!< print an openrisc register in hex */
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#define PRIdREG   PRId32        /*!< print an openrisc register in decimals */
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/* Basic types for openrisc */
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typedef uint32_t  oraddr_t;     /*!< Address as addressed by openrisc */
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typedef uint32_t  uorreg_t;     /*!< An unsigned register of openrisc */
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typedef int32_t   orreg_t;      /*!< A signed register of openrisc */
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#endif /* ARCH__H */

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