OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cpu-config.c] - Blame information for rev 198

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 19 jeremybenn
/* cpu-config.c -- CPU configuration
2
 
3
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
4
   Copyright (C) 2008 Embecosm Limited
5
 
6
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
7
 
8
   This file is part of OpenRISC 1000 Architectural Simulator.
9
 
10
   This program is free software; you can redistribute it and/or modify it
11
   under the terms of the GNU General Public License as published by the Free
12
   Software Foundation; either version 3 of the License, or (at your option)
13
   any later version.
14
 
15
   This program is distributed in the hope that it will be useful, but WITHOUT
16
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
18
   more details.
19
 
20
   You should have received a copy of the GNU General Public License along
21
   with this program.  If not, see <http://www.gnu.org/licenses/>. */
22
 
23
/* This program is commented throughout in a fashion suitable for processing
24
   with Doxygen. */
25
 
26
/* Broken out from sim-config.c */
27
 
28
 
29
/* Autoconf and/or portability configuration */
30
#include "config.h"
31
 
32
/* System includes */
33
#include <stdio.h>
34
 
35
/* Package includes */
36
#include "cpu-config.h"
37
#include "sim-config.h"
38
#include "spr-defs.h"
39
#include "execute.h"
40
 
41
 
42
#define WARNING(s) fprintf (stderr, "Warning: config.%s: %s\n", cur_section->name, (s))
43
 
44
/*---------------------------------------------------------------------------*/
45
/*!Set the CPU version
46
 
47
   Value must be an 8-bit integer. Larger values are truncated with a warning.
48
 
49
   @param[in] val  The value to use
50
   @param[in] dat  The config data structure (not used here)                 */
51
/*---------------------------------------------------------------------------*/
52
static void
53
cpu_ver (union param_val  val,
54
         void            *dat)
55
{
56
  if (val.int_val > 0xff)
57
    {
58
      WARNING ("CPU version > 8 bits truncated\n");
59
    }
60
 
61
  cpu_state.sprs[SPR_VR] &= ~SPR_VR_VER;
62
  cpu_state.sprs[SPR_VR] |= (val.int_val & 0xff) << SPR_VR_VER_OFF;
63
 
64
}       /* cpu_ver() */
65
 
66
 
67
/*---------------------------------------------------------------------------*/
68
/*!Set the CPU configuration
69
 
70
   Value must be an 8-bit integer. Larger values are truncated with a warning.
71
 
72
   @param[in] val  The value to use
73
   @param[in] dat  The config data structure (not used here)                 */
74
/*---------------------------------------------------------------------------*/
75
static void
76
cpu_cfg (union param_val  val,
77
         void            *dat)
78
{
79
  if (val.int_val > 0xff)
80
    {
81
      WARNING ("CPU configuration > 8 bits truncated\n");
82
    }
83
 
84
  cpu_state.sprs[SPR_VR] &= ~SPR_VR_CFG;
85
  cpu_state.sprs[SPR_VR] |= (val.int_val & 0xff) << SPR_VR_CFG_OFF;
86
 
87
}       /* cpu_cfg() */
88
 
89
 
90
/*---------------------------------------------------------------------------*/
91
/*!Set the CPU revision
92
 
93
   Value must be an 6-bit integer. Larger values are truncated with a warning.
94
 
95
 
96
   @param[in] val  The value to use
97
   @param[in] dat  The config data structure (not used here)                 */
98
/*---------------------------------------------------------------------------*/
99
static void
100
cpu_rev (union param_val  val,
101
         void            *dat)
102
{
103
  if (val.int_val > 0x3f)
104
    {
105
      WARNING ("CPU revision > 6 bits truncated\n");
106
    }
107
 
108
  cpu_state.sprs[SPR_VR] &= ~SPR_VR_REV_OFF ;
109
  cpu_state.sprs[SPR_VR] |= (val.int_val & 0x3f) << SPR_VR_REV_OFF ;
110
 
111
}       /* cpu_rev() */
112
 
113
 
114
static void
115
cpu_upr (union param_val val, void *dat)
116
{
117
  cpu_state.sprs[SPR_UPR] = val.int_val;
118
}
119
 
120
/*---------------------------------------------------------------------------*/
121
/*!Set the CPU configuration
122
 
123
   Value must be just the OB32S instruction set bit. Nothing else is currently
124
   supported. If other values are specified, they will be set, but with a
125
   warning.
126
 
127
 
128
   @param[in] val  The value to use
129
   @param[in] dat  The config data structure (not used here)                 */
130
/*---------------------------------------------------------------------------*/
131
static void
132
cpu_cfgr (union param_val  val,
133
          void            *dat)
134
{
135
  if (SPR_CPUCFGR_OB32S != val.int_val)
136
    {
137
      WARNING ("CPU configuration: only OB32S currently supported\n");
138
    }
139
 
140
  cpu_state.sprs[SPR_CPUCFGR] = val.int_val;
141
 
142
}       /* cpu_cfgr() */
143
 
144
 
145
/*---------------------------------------------------------------------------*/
146
/*!Set the CPU supervision register
147
 
148
   Only the lowest 17 bits may be set. The top 4 bits are for context ID's
149
   (not currently supported), the rest are reserved and should not be set.
150
 
151
   If such values are specified, the value will be set (it has no effect), but
152
   with a warning.
153
 
154
   @param[in] val  The value to use
155
   @param[in] dat  The config data structure (not used here)                 */
156
/*---------------------------------------------------------------------------*/
157
static void
158
cpu_sr (union param_val  val,
159
        void            *dat)
160
{
161
  if (0 != (val.int_val & 0xf0000000))
162
    {
163
      WARNING ("Supervision Register ContextID not supported: ignored\n");
164
    }
165
  else if (val.int_val > 0x1ffff)
166
    {
167
      WARNING ("Supervision Register reserved bits set: ignored\n");
168
    }
169
 
170
  cpu_state.sprs[SPR_SR] = val.int_val;
171
 
172
}       /* cpu_sr() */
173
 
174
 
175
static void
176
cpu_hazards (union param_val val, void *dat)
177
{
178
  config.cpu.hazards = val.int_val;
179
}
180
 
181
static void
182
cpu_superscalar (union param_val val, void *dat)
183
{
184
  config.cpu.superscalar = val.int_val;
185
}
186
 
187
static void
188
cpu_dependstats (union param_val val, void *dat)
189
{
190
  config.cpu.dependstats = val.int_val;
191
}
192
 
193
static void
194
cpu_sbuf_len (union param_val val, void *dat)
195
{
196
  if (val.int_val >= MAX_SBUF_LEN)
197
    {
198
      config.cpu.sbuf_len = MAX_SBUF_LEN - 1;
199
      WARNING ("sbuf_len too large; truncated.");
200
    }
201
  else if (val.int_val < 0)
202
    {
203
      config.cpu.sbuf_len = 0;
204
      WARNING ("sbuf_len negative; disabled.");
205
    }
206
  else
207
    config.cpu.sbuf_len = val.int_val;
208
}
209
 
210 100 julius
static void
211
cpu_hardfloat (union param_val val, void *dat)
212
{
213
  config.cpu.hardfloat = val.int_val;
214
}
215 19 jeremybenn
/*---------------------------------------------------------------------------*/
216
/*!Register the functions to handle a section cpu
217
 
218
   This section does not allocate dynamically a data structure holding its
219
   config information. It's all in the global config.sim data
220
   structure. Therefore it does not need a start and end function to
221
   initialize default values (although it might be clearer to do so). The
222
   default values are set in init_defconfig().                               */
223
/*---------------------------------------------------------------------------*/
224
void
225
reg_cpu_sec ()
226
{
227
  struct config_section *sec = reg_config_sec ("cpu", NULL, NULL);
228
 
229
  reg_config_param (sec, "ver",         paramt_int, cpu_ver);
230
  reg_config_param (sec, "cfg",         paramt_int, cpu_cfg);
231
  reg_config_param (sec, "rev",         paramt_int, cpu_rev);
232
  reg_config_param (sec, "upr",         paramt_int, cpu_upr);
233
  reg_config_param (sec, "cfgr",        paramt_int, cpu_cfgr);
234
  reg_config_param (sec, "sr",          paramt_int, cpu_sr);
235
  reg_config_param (sec, "superscalar", paramt_int, cpu_superscalar);
236
  reg_config_param (sec, "hazards",     paramt_int, cpu_hazards);
237
  reg_config_param (sec, "dependstats", paramt_int, cpu_dependstats);
238
  reg_config_param (sec, "sbuf_len",    paramt_int, cpu_sbuf_len);
239 100 julius
  reg_config_param (sec, "hardfloat",   paramt_int, cpu_hardfloat);
240 19 jeremybenn
 
241
}       /* reg_cpu_sec() */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.