OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [debug/] [gdb.h] - Blame information for rev 454

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 19 jeremybenn
/* config.h -- Simulator configuration header file
2
 
3
   Copyright (C) 2001 Chris Ziomkowski, chris@asics.ws
4
   Copyright (C) 2008 Embecosm Limited
5
 
6
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
7
 
8
   This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
9
 
10
   This program is free software; you can redistribute it and/or modify it
11
   under the terms of the GNU General Public License as published by the Free
12
   Software Foundation; either version 3 of the License, or (at your option)
13
   any later version.
14
 
15
   This program is distributed in the hope that it will be useful, but WITHOUT
16
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
18
   more details.
19
 
20
   You should have received a copy of the GNU General Public License along
21
   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
22
 
23
/* This program is commented throughout in a fashion suitable for processing
24
   with Doxygen. */
25
 
26
/* The data in here is copied from or1k-jtag.h in the GDB 6.8 port for
27
   OpenRISC 1000 */
28
 
29
 
30
#ifndef GDB__H
31
#define GDB__H
32
 
33
/*! Error codes for the OpenRISC 1000 JTAG debugging protocol */
34
enum or1k_jtag_errors  /* modified <chris@asics.ws> CZ 24/05/01 */
35
{
36
  /* Codes > 0 are for system errors */
37
 
38
  ERR_NONE                           =   0,
39
  ERR_CRC                            =  -1,
40
  ERR_MEM                            =  -2,
41
  JTAG_PROXY_INVALID_COMMAND         =  -3,
42
  JTAG_PROXY_SERVER_TERMINATED       =  -4,
43
  JTAG_PROXY_NO_CONNECTION           =  -5,
44
  JTAG_PROXY_PROTOCOL_ERROR          =  -6,
45
  JTAG_PROXY_COMMAND_NOT_IMPLEMENTED =  -7,
46
  JTAG_PROXY_INVALID_CHAIN           =  -8,
47
  JTAG_PROXY_INVALID_ADDRESS         =  -9,
48
  JTAG_PROXY_ACCESS_EXCEPTION        = -10,     /* Write to ROM */
49
  JTAG_PROXY_INVALID_LENGTH          = -11,
50
  JTAG_PROXY_OUT_OF_MEMORY           = -12
51
};
52
 
53
/*! The OR1K JTAG proxy protocol commands. */
54
enum or1k_jtag_proxy_protocol_commands {
55
  OR1K_JTAG_COMMAND_READ        = 1,
56
  OR1K_JTAG_COMMAND_WRITE       = 2,
57
  OR1K_JTAG_COMMAND_READ_BLOCK  = 3,
58
  OR1K_JTAG_COMMAND_WRITE_BLOCK = 4,
59
  OR1K_JTAG_COMMAND_CHAIN       = 5,
60
};
61
 
62
/* Each transmit structure must begin with an integer which specifies the type
63
   of command. Information after this is variable. Make sure to have all
64
   information aligned properly. If we stick with 32 bit integers, it should
65
   be portable onto every platform. These structures will be transmitted
66
   across the network in network byte order. */
67
 
68
struct jtr_read_message {
69
  uint32_t  command;
70
  uint32_t  length;
71
  uint32_t  address;
72
};
73
 
74
struct jtr_write_message {
75
  uint32_t  command;
76
  uint32_t  length;
77
  uint32_t  address;
78
  uint32_t  data_h;
79
  uint32_t  data_l;
80
};
81
 
82
struct jtr_read_block_message {
83
  uint32_t  command;
84
  uint32_t  length;
85
  uint32_t  address;
86
  int32_t   num_regs;
87
};
88
 
89
struct jtr_write_block_message {
90
  uint32_t  command;
91
  uint32_t  length;
92
  uint32_t  address;
93
  int32_t   num_regs;
94
  uint32_t  data[1];
95
};
96
 
97
struct jtr_chain_message {
98
  uint32_t  command;
99
  uint32_t  length;
100
  uint32_t  chain;
101
};
102
 
103
/* The responses are messages specific, however convention states the first
104
   word should be an error code. Again, sticking with 32 bit integers should
105
   provide maximum portability. */
106
 
107
struct jtr_failure_response {
108
  int32_t  status;
109
};
110
 
111
struct jtr_read_response {
112
  int32_t   status;
113
  uint32_t  data_h;
114
  uint32_t  data_l;
115
};
116
 
117
struct jtr_write_response {
118
  int32_t  status;
119
};
120
 
121
struct jtr_read_block_response {
122
  int32_t   status;
123
  int32_t   num_regs;
124
  uint32_t  data[1];
125
};
126
 
127
struct jtr_write_block_response {
128
  int32_t  status;
129
};
130
 
131
struct jtr_chain_response {
132
  int32_t  status;
133
};
134
 
135
 
136
#endif  /* GDB__H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.