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[/] [openrisc/] [trunk/] [or1ksim/] [mmu/] [dmmu.h] - Blame information for rev 508

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1 19 jeremybenn
/* dmmu.h -- Data MMU header file
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   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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   Copyright (C) 2008 Embecosm Limited
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   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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   This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
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   This program is free software; you can redistribute it and/or modify it
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   under the terms of the GNU General Public License as published by the Free
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   Software Foundation; either version 3 of the License, or (at your option)
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   any later version.
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   This program is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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   more details.
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   You should have received a copy of the GNU General Public License along
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   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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/* This program is commented throughout in a fashion suitable for processing
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   with Doxygen. */
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#ifndef DMMU__H
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#define DMMU__H
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/* Package includes */
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#include "sim-config.h"
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struct dmmu
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{
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  int       enabled;            /* Whether DMMU is enabled */
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  int       nways;              /* Number of DTLB ways */
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  int       nsets;              /* Number of DTLB sets */
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  int       pagesize;           /* DTLB page size */
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  int       pagesize_log2;      /* DTLB page size (log2(pagesize)) */
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  oraddr_t  page_offset_mask;   /* Address mask to get page offset */
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  oraddr_t  page_mask;          /* Page number mask (diff. from vpn) */
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  oraddr_t  vpn_mask;           /* Address mask to get vpn */
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  int       lru_reload;         /* What to reload the lru value to */
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  oraddr_t  set_mask;           /* Mask to get set of an address */
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  int       entrysize;          /* DTLB entry size */
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  int       ustates;            /* number of DTLB usage states */
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  int       missdelay;          /* How much cycles does the miss cost */
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  int       hitdelay;           /* How much cycles does the hit cost */
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};
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#define DADDR_PAGE(addr) ((addr) & dmmu_state->page_mask)
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/* FIXME: Remove the need for this global */
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extern struct dmmu *dmmu_state;
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/* Prototypes for external use */
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extern oraddr_t  dmmu_translate (oraddr_t  virtaddr,
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                                 int       write_access);
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extern oraddr_t  dmmu_simulate_tlb (oraddr_t  virtaddr,
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                                    int       write_access);
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extern oraddr_t  peek_into_dtlb (oraddr_t  virtaddr,
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                                 int       write_access,
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                                 int       through_dc);
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extern void      reg_dmmu_sec ();
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#endif  /* DMMU__H */

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